OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.dg/] [20020222-1.c] - Blame information for rev 801

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 689 jeremybenn
/* PR optimization/5747
2
   This testcase ICEd on sparc because move_movables created new pseudos,
3
   but did not update reg info which load_mems needed.  */
4
/* { dg-do compile } */
5
/* { dg-options "-O2" } */
6
/* { dg-options "-O2 -fPIC" { target fpic } } */
7
 
8
extern void foo (void);
9
static char a[256];
10
 
11
void
12
bar (void)
13
{
14
  unsigned int i;
15
  static int b = 0;
16
  int c;
17
 
18
  if (b == 0)
19
    {
20
      b = 1;
21
      foo ();
22
      c = 0;
23
      for (i = 0; i < 10; i++)
24
        a[i + '0'] = c++;
25
      for (i = 'A'; i <= 'Z'; i++)
26
        a[i] = c++;
27
      a['$'] = c++;
28
      a['%'] = c++;
29
      a['.'] = c++;
30
      a['_'] = c++;
31
      for (i = 'a'; i <= 'z'; i++)
32
        a[i] = c++;
33
    }
34
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.