OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.dg/] [20100906-1.c] - Blame information for rev 689

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 689 jeremybenn
/* { dg-do run } */
2
/* { dg-options "-O2" } */
3
/* { dg-options "-O2 -fno-short-enums -Wl,--no-enum-size-warning" {target arm_eabi} } */
4
 
5
/* This testcase got misoptimized by combine due to a wrong setting of
6
   subst_low_luid in try_combine.  */
7
 
8
enum rtx_code {
9
  A, B
10
};
11
 
12
void abort (void);
13
 
14
struct rtx_def {
15
  __extension__ enum rtx_code code:16;
16
};
17
typedef struct rtx_def *rtx;
18
 
19
void __attribute__((noinline))
20
add_constraint (unsigned char is_a)
21
{
22
  if (is_a)
23
    abort ();
24
}
25
 
26
void __attribute__((noinline))
27
foo (rtx defn)
28
{
29
  switch (defn->code)
30
    {
31
    case A:
32
    case B:
33
      add_constraint (defn->code == A);
34
      break;
35
    default:
36
      break;
37
    }
38
}
39
 
40
int
41
main ()
42
{
43
  struct rtx_def r;
44
 
45
  r.code = B;
46
 
47
  foo (&r);
48
  return 0;
49
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.