URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.dg/] [attr-weakref-1a.c] - Blame information for rev 801


int uv4;
int uv5;
int uv7;
int uv8;
void uf4 (void) {}
void uf5 (void) {}
void uf7 (void) {}
void uf8 (void) {}

Line No.	Rev	Author	Line
1	689	jeremybenn	`int uv4;`
2			`int uv5;`
3			`int uv7;`
4			`int uv8;`
5			`void uf4 (void) {}`
6			`void uf5 (void) {}`
7			`void uf7 (void) {}`
8			`void uf8 (void) {}`