OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.dg/] [guality/] [pr45003-3.c] - Blame information for rev 689

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 689 jeremybenn
/* PR debug/45003 */
2
/* { dg-do run { target { x86_64-*-* && lp64 } } } */
3
/* { dg-options "-g" } */
4
 
5
int __attribute__((noinline))
6
foo (unsigned short *p)
7
{
8
  int a = (short) *p;
9
  asm volatile ("nop" : : "D" ((int) *p));
10
  asm volatile ("nop" : : "D" ((int) *p));      /* { dg-final { gdb-test 10 "a" "-32648" } } */
11
  return 0;
12
}
13
 
14
int __attribute__((noinline))
15
bar (short *p)
16
{
17
  unsigned int a = (unsigned short) *p;
18
  asm volatile ("nop" : : "D" ((unsigned int) *p));
19
  asm volatile ("nop" : : "D" ((unsigned int) *p));     /* { dg-final { gdb-test 19 "a" "0x8078" } } */
20
  return 0;
21
}
22
 
23
int
24
main ()
25
{
26
  unsigned short us = 0x8078;
27
  foo (&us);
28
  short s = -32648;
29
  bar (&s);
30
  return 0;
31
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.