OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.dg/] [pr45352-2.c] - Blame information for rev 689

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 689 jeremybenn
/* { dg-do compile { target powerpc*-*-* ia64-*-* x86_64-*-* } } */
2
/* { dg-options "-O1 -freorder-blocks -fschedule-insns2 -funswitch-loops -fselective-scheduling2 -fsel-sched-pipelining -funroll-all-loops" } */
3
void
4
foo1 (int *s)
5
{
6
  s[0] = s[1];
7
  while (s[6] - s[8])
8
    {
9
      s[6] -= s[8];
10
      if (s[8] || s[0])
11
        {
12
          s[3] += s[0];
13
          s[4] += s[1];
14
        }
15
      s[7]++;
16
    }
17
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.