1 |
689 |
jeremybenn |
/* { dg-do compile } */
|
2 |
|
|
/* { dg-options "-O2 -ftree-tail-merge -fno-short-enums" } */
|
3 |
|
|
|
4 |
|
|
typedef struct rtx_def *rtx;
|
5 |
|
|
enum debug_info_levels
|
6 |
|
|
{
|
7 |
|
|
ARM_FLOAT_ABI_SOFT, ARM_FLOAT_ABI_SOFTFP, ARM_FLOAT_ABI_HARD
|
8 |
|
|
};
|
9 |
|
|
struct gcc_options
|
10 |
|
|
{
|
11 |
|
|
int x_target_flags;
|
12 |
|
|
};
|
13 |
|
|
extern struct gcc_options global_options;
|
14 |
|
|
extern int arm_arch_thumb2;
|
15 |
|
|
enum rtx_code
|
16 |
|
|
{
|
17 |
|
|
UNSPEC, UNSPEC_VOLATILE, ADDR_VEC, SET, CLOBBER, CALL, RETURN,
|
18 |
|
|
SIMPLE_RETURN, EH_RETURN, TRAP_IF, CONST_INT, CONST_FIXED, CONST_DOUBLE,
|
19 |
|
|
CONST_VECTOR, CONST_STRING, CONST, PC, REG, SCRATCH, SUBREG,
|
20 |
|
|
STRICT_LOW_PART, CONCAT, CONCATN, MEM, LABEL_REF, SYMBOL_REF, CC0,
|
21 |
|
|
IF_THEN_ELSE, COMPARE, PLUS, MINUS, NEG, MULT, SS_MULT, US_MULT, DIV,
|
22 |
|
|
SS_DIV, US_DIV, MOD, UDIV, UMOD, AND, IOR, XOR, NOT, ASHIFT, ROTATE,
|
23 |
|
|
ASHIFTRT, LSHIFTRT, ROTATERT, PRE_DEC, PRE_INC, POST_DEC, POST_INC,
|
24 |
|
|
PRE_MODIFY, POST_MODIFY, NE, EQ, GE, GT, LE, LT, GEU, GTU, LEU, LTU,
|
25 |
|
|
UNORDERED, ORDERED, UNEQ, UNGE, UNGT, UNLE, UNLT, LTGT, SIGN_EXTEND,
|
26 |
|
|
ZERO_EXTEND, TRUNCATE, FLOAT_EXTEND, FLOAT_TRUNCATE, FLOAT, FIX,
|
27 |
|
|
UNSIGNED_FLOAT, UNSIGNED_FIX, SIGN_EXTRACT, ZERO_EXTRACT, HIGH, LO_SUM,
|
28 |
|
|
VEC_MERGE, VEC_SELECT, VEC_CONCAT, VEC_DUPLICATE, SS_PLUS, US_PLUS,
|
29 |
|
|
SS_MINUS, SS_NEG, US_NEG, SS_ABS, SS_ASHIFT, US_ASHIFT, US_MINUS,
|
30 |
|
|
SS_TRUNCATE, US_TRUNCATE, FMA, VAR_LOCATION, DEBUG_IMPLICIT_PTR,
|
31 |
|
|
ENTRY_VALUE, DEBUG_PARAMETER_REF, LAST_AND_UNUSED_RTX_CODE
|
32 |
|
|
};
|
33 |
|
|
union rtunion_def
|
34 |
|
|
{
|
35 |
|
|
};
|
36 |
|
|
struct rtx_def
|
37 |
|
|
{
|
38 |
|
|
enum rtx_code code:16;
|
39 |
|
|
}
|
40 |
|
|
builtin_info_type;
|
41 |
|
|
enum constraint_num
|
42 |
|
|
{
|
43 |
|
|
CONSTRAINT__UNKNOWN =
|
44 |
|
|
0, CONSTRAINT_f, CONSTRAINT_t, CONSTRAINT_v, CONSTRAINT_w, CONSTRAINT_x,
|
45 |
|
|
CONSTRAINT_y, CONSTRAINT_z, CONSTRAINT_l, CONSTRAINT_h, CONSTRAINT_j,
|
46 |
|
|
CONSTRAINT_Pj, CONSTRAINT_PJ, CONSTRAINT_k, CONSTRAINT_b, CONSTRAINT_c,
|
47 |
|
|
CONSTRAINT_I, CONSTRAINT_J, CONSTRAINT_K, CONSTRAINT_L, CONSTRAINT_M,
|
48 |
|
|
CONSTRAINT_N, CONSTRAINT_O, CONSTRAINT_Pa, CONSTRAINT_Pb, CONSTRAINT_Pc,
|
49 |
|
|
CONSTRAINT_Pd, CONSTRAINT_Ps, CONSTRAINT_Pt, CONSTRAINT_Pu, CONSTRAINT_Pv,
|
50 |
|
|
CONSTRAINT_Pw, CONSTRAINT_Px, CONSTRAINT_Py, CONSTRAINT_G, CONSTRAINT_H,
|
51 |
|
|
CONSTRAINT_Dz, CONSTRAINT_Da, CONSTRAINT_Db, CONSTRAINT_Dc, CONSTRAINT_Di,
|
52 |
|
|
CONSTRAINT_Dn, CONSTRAINT_Dl, CONSTRAINT_DL, CONSTRAINT_Dv, CONSTRAINT_Dy,
|
53 |
|
|
CONSTRAINT_Ut, CONSTRAINT_Uv, CONSTRAINT_Uy, CONSTRAINT_Un, CONSTRAINT_Um,
|
54 |
|
|
CONSTRAINT_Us, CONSTRAINT_Uq, CONSTRAINT_Q, CONSTRAINT_Uu, CONSTRAINT_Uw,
|
55 |
|
|
CONSTRAINT__LIMIT
|
56 |
|
|
};
|
57 |
|
|
typedef struct VEC_char_base
|
58 |
|
|
{
|
59 |
|
|
}
|
60 |
|
|
VEC_int_heap;
|
61 |
|
|
static inline int
|
62 |
|
|
satisfies_constraint_j (rtx op)
|
63 |
|
|
{
|
64 |
|
|
long long ival = 0;
|
65 |
|
|
return ((((!((global_options.x_target_flags & (1 << 14)) != 0))
|
66 |
|
|
|| arm_arch_thumb2) && arm_arch_thumb2))
|
67 |
|
|
&& ((((enum rtx_code) (op)->code) == HIGH)
|
68 |
|
|
|| ((((enum rtx_code) (op)->code) == CONST_INT)
|
69 |
|
|
&& (((ival & 0xffff0000) == 0))));
|
70 |
|
|
}
|
71 |
|
|
|
72 |
|
|
int
|
73 |
|
|
constraint_satisfied_p (rtx op, enum constraint_num c)
|
74 |
|
|
{
|
75 |
|
|
switch (c)
|
76 |
|
|
{
|
77 |
|
|
case CONSTRAINT_j:
|
78 |
|
|
return satisfies_constraint_j (op);
|
79 |
|
|
}
|
80 |
|
|
}
|