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[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.dg/] [simulate-thread/] [atomic-other-int128.c] - Blame information for rev 801

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Line No. Rev Author Line
1 689 jeremybenn 
/* { dg-do link } */
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/* { dg-require-effective-target sync_int_128_runtime } */
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/* { dg-options "-mcx16" { target { x86_64-*-* i?86-*-* } } } */
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/* { dg-final { simulate-thread } } */
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#include <stdio.h>
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#include "simulate-thread.h"
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/* Test all the __sync routines for proper atomicity on 16 byte values.  */
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__int128_t zero = 0;
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__int128_t max = ~0;
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__int128_t changing_value = 0;
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__int128_t value = 0;
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__int128_t ret;
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void test_abort()
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{
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  static int reported = 0;
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  if (!reported)
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    {
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      printf ("FAIL: improper execution of __sync builtin.\n");
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      reported = 1;
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    }
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}
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void simulate_thread_other_threads ()
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{
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}
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int simulate_thread_step_verify ()
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{
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  if (value != zero && value != max)
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    {
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      printf ("FAIL: invalid intermediate result for value.\n");
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      return 1;
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    }
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  return 0;
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}
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int simulate_thread_final_verify ()
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{
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  if (value != 0)
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    {
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      printf ("FAIL: invalid final result for value.\n");
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      return 1;
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    }
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  return 0;
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}
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/* All values written to 'value' alternate between 'zero' and 'max'. Any other
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   value detected by simulate_thread_step_verify() between instructions would indicate
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   that the value was only partially written, and would thus fail this
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   atomicity test.
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   This function tests each different __atomic routine once, with the
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   exception of the load instruction which requires special testing.  */
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__attribute__((noinline))
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void simulate_thread_main()
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{
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  ret = __atomic_exchange_n (&value, max, __ATOMIC_SEQ_CST);
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  if (ret != zero || value != max)
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    test_abort();
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  __atomic_store_n (&value, zero, __ATOMIC_SEQ_CST);
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  if (value != zero)
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    test_abort();
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  ret = __atomic_fetch_add (&value, max, __ATOMIC_SEQ_CST);
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  if (value != max || ret != zero)
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    test_abort ();
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  ret = __atomic_fetch_sub (&value, max, __ATOMIC_SEQ_CST);
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  if (value != zero || ret != max)
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    test_abort ();
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  ret = __atomic_fetch_or (&value, max, __ATOMIC_SEQ_CST);
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  if (value != max || ret != zero)
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    test_abort ();
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  ret = __atomic_fetch_and (&value, max, __ATOMIC_SEQ_CST);
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  if (value != max || ret != max)
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    test_abort ();
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  ret = __atomic_fetch_xor (&value, max, __ATOMIC_SEQ_CST);
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  if (value != zero || ret != max)
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    test_abort ();
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  ret = __atomic_add_fetch (&value, max, __ATOMIC_SEQ_CST);
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  if (value != max || ret != max)
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    test_abort ();
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  ret = __atomic_sub_fetch (&value, max, __ATOMIC_SEQ_CST);
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  if (value != zero || ret != zero)
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    test_abort ();
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  ret = __atomic_or_fetch (&value, max, __ATOMIC_SEQ_CST);
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  if (value != max || ret != max)
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    test_abort ();
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  ret = __atomic_and_fetch (&value, max, __ATOMIC_SEQ_CST);
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  if (value != max || ret != max)
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    test_abort ();
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  ret = __atomic_xor_fetch (&value, max, __ATOMIC_SEQ_CST);
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  if (value != zero || ret != zero)
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    test_abort ();
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}
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int main()
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{
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  simulate_thread_main ();
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  simulate_thread_done ();
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  return 0;
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}

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