OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.dg/] [torture/] [asm-subreg-1.c] - Blame information for rev 801

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 689 jeremybenn
/* PR middle-end/20491 */
2
 
3
/* { dg-do compile } */
4
/* { dg-skip-if "" { hppa*64*-*-* || sparc-*-vxworks* } "*" "" } */
5
 
6
/* Combine used to introduce invalid subregs for the asm input, and
7
   we'd crash later on, when removing all subregs.  */
8
 
9
volatile unsigned short _const_32 [4] = {1,2,3,4};
10
void
11
evas_common_convert_yuv_420p_601_rgba()
12
{
13
  __asm__ __volatile__ ("" : : "X" (*_const_32));
14
}
15
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.