OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.dg/] [vect/] [bb-slp-21.c] - Blame information for rev 689

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 689 jeremybenn
/* { dg-require-effective-target vect_int } */
2
 
3
#include <stdarg.h>
4
#include "tree-vect.h"
5
 
6
#define N 16 
7
 
8
unsigned int b[N];
9
unsigned int out[N];
10
unsigned int in[N] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15};
11
 
12
__attribute__ ((noinline)) int
13
main1 (unsigned int x, unsigned int y)
14
{
15
  int i;
16
  unsigned int a0, a1, a2, a3;
17
 
18
  /* Two SLP instances in one basic block.  */
19
  if (x > y)
20
    x = x + y;
21
  else
22
    y = x;
23
 
24
  a0 = in[0] + 23;
25
  a1 = in[1] + 142;
26
  a2 = in[2] + 2;
27
  a3 = in[3] + 31;
28
 
29
  b[0] = a0;
30
  b[1] = a1;
31
  b[2] = a2;
32
  b[3] = a3;
33
 
34
  out[0] = a0 * x;
35
  out[1] = a1 * y;
36
  out[2] = a2 * x;
37
  out[3] = a3 * y;
38
 
39
  if (x)
40
    __asm__ volatile ("" : : : "memory");
41
 
42
  /* Check results.  */
43
  if (out[0] != (in[0] + 23) * x
44
      || out[1] != (in[1] + 142) * y
45
      || out[2] != (in[2] + 2) * x
46
      || out[3] != (in[3] + 31) * y
47
      || b[0] != (in[0] + 23)
48
      || b[1] != (in[1] + 142)
49
      || b[2] != (in[2] + 2)
50
      || b[3] != (in[3] + 31))
51
 
52
    abort();
53
 
54
  return 0;
55
}
56
 
57
int main (void)
58
{
59
  check_vect ();
60
 
61
  main1 (2, 3);
62
 
63
  return 0;
64
}
65
 
66
/* { dg-final { scan-tree-dump-times "basic block vectorized using SLP" 1 "slp"  } } */
67
/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 1 "slp" { target { ! {vect_int_mult } } } } } */
68
/* { dg-final { scan-tree-dump-times "vectorizing stmts using SLP" 2 "slp" { target vect_int_mult } } } */
69
/* { dg-final { cleanup-tree-dump "slp" } } */
70
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.