OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.dg/] [vect/] [pr48765.c] - Blame information for rev 689

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 689 jeremybenn
/* { dg-do compile { target powerpc*-*-* } } */
2
/* { dg-options "-m64 -O3 -mcpu=power6" } */
3
 
4
enum reg_class
5
{
6
  NO_REGS, AP_REG, XRF_REGS, GENERAL_REGS, AGRF_REGS, XGRF_REGS, ALL_REGS,
7
    LIM_REG_CLASSES
8
};
9
enum machine_mode
10
{
11
  VOIDmode, QImode, HImode, PSImode, SImode, PDImode, DImode, TImode, OImode,
12
    QFmode, HFmode, TQFmode, SFmode, DFmode, XFmode, TFmode, SCmode, DCmode,
13
    XCmode, TCmode, CQImode, CHImode, CSImode, CDImode, CTImode, COImode,
14
    BLKmode, CCmode, CCEVENmode, MAX_MACHINE_MODE
15
};
16
typedef struct rtx_def
17
{
18
  int mode:8;
19
}
20
 *rtx;
21
extern rtx *regno_reg_rtx;
22
typedef unsigned int HARD_REG_ELT_TYPE;
23
typedef HARD_REG_ELT_TYPE HARD_REG_SET[((64 + 32 - 1) / 32)];
24
extern int reg_alloc_order[64];
25
extern int max_regno;
26
extern int *reg_n_calls_crossed;
27
extern short *reg_renumber;
28
static int *reg_where_dead;
29
static int *reg_where_born;
30
static int *reg_order;
31
static char *regs_change_size;
32
static HARD_REG_SET *after_insn_hard_regs;
33
static int stupid_find_reg (int, enum reg_class, enum machine_mode, int, int,
34
                            int);
35
void
36
stupid_life_analysis (f, nregs, file)
37
     rtx f;
38
{
39
  register int i;
40
  for (i = (((64)) + 3) + 1; i < max_regno; i++)
41
    {
42
      register int r = reg_order[i];
43
      if ((int) LIM_REG_CLASSES > 1)
44
        reg_renumber[r] =
45
          stupid_find_reg (reg_n_calls_crossed[r], reg_preferred_class (r),
46
                           ((regno_reg_rtx[r])->mode), reg_where_born[r],
47
                           reg_where_dead[r], regs_change_size[r]);
48
    }
49
}
50
 
51
static int
52
stupid_find_reg (call_preserved, class, mode, born_insn, dead_insn,
53
                 changes_size)
54
     int call_preserved;
55
     enum reg_class class;
56
     enum machine_mode mode;
57
{
58
  register int i, ins;
59
  HARD_REG_SET used, this_reg;
60
  for (ins = born_insn; ins < dead_insn; ins++)
61
    do
62
      {
63
        register HARD_REG_ELT_TYPE *scan_tp_ = (used), *scan_fp_ =
64
          (after_insn_hard_regs[ins]);
65
        for (i = 0; i < ((64 + 32 - 1) / 32); i++)
66
          *scan_tp_++ |= *scan_fp_++;
67
      }
68
    while (0);
69
  for (i = 0; i < 64; i++)
70
    {
71
      int regno = reg_alloc_order[i];
72
      if (((used)[(regno) / ((unsigned) 32)] &
73
           (((HARD_REG_ELT_TYPE) (1)) << ((regno) % ((unsigned) 32)))))
74
        {
75
          register int j;
76
          if (j == regno)
77
            return regno;
78
        }
79
    }
80
}
81
 
82
/* { dg-final { cleanup-tree-dump "vect" } } */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.