OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.dg/] [vect/] [vect-strided-u32-i4.c] - Blame information for rev 801

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 689 jeremybenn
/* { dg-require-effective-target vect_int } */
2
 
3
#include <stdarg.h>
4
#include "tree-vect.h"
5
 
6
#define N 128 
7
 
8
typedef struct {
9
   int a;
10
   int b;
11
   int c;
12
   int d;
13
} s;
14
 
15
__attribute__ ((noinline)) int
16
main1 (s *arr)
17
{
18
  int i;
19
  s *ptr = arr;
20
  s res[N];
21
 
22
  for (i = 0; i < N; i++)
23
    {
24
      res[i].c = ptr->b - ptr->a + ptr->d - ptr->c;
25
      res[i].a = ptr->a + ptr->c + ptr->b + ptr->d;
26
      res[i].d = ptr->b - ptr->a + ptr->d - ptr->c;
27
      res[i].b = ptr->b - ptr->a + ptr->d - ptr->c;
28
      ptr++;
29
    }
30
 
31
  /* check results:  */
32
  for (i = 0; i < N; i++)
33
    {
34
      if (res[i].c != arr[i].b - arr[i].a + arr[i].d - arr[i].c
35
          || res[i].a != arr[i].a + arr[i].c + arr[i].b + arr[i].d
36
          || res[i].d != arr[i].b - arr[i].a + arr[i].d - arr[i].c
37
          || res[i].b != arr[i].b - arr[i].a + arr[i].d - arr[i].c)
38
        abort ();
39
    }
40
 
41
  return 0;
42
}
43
 
44
int main (void)
45
{
46
  int i;
47
  s arr[N];
48
 
49
  check_vect ();
50
 
51
  for (i = 0; i < N; i++)
52
    {
53
      arr[i].a = i;
54
      arr[i].b = i * 2;
55
      arr[i].c = 17;
56
      arr[i].d = i+34;
57
      if (arr[i].a == 178)
58
         abort();
59
    }
60
 
61
  main1 (arr);
62
 
63
  return 0;
64
}
65
 
66
/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect"  { target vect_strided4 } } } */
67
/* { dg-final { cleanup-tree-dump "vect" } } */
68
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.