OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.dg/] [vect/] [vect-widen-shift-u16.c] - Blame information for rev 801

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 689 jeremybenn
/* { dg-require-effective-target vect_int } */
2
/* { dg-require-effective-target vect_shift } */
3
 
4
#include <stdarg.h>
5
#include "tree-vect.h"
6
 
7
#define N 64
8
#define C 7
9
 
10
__attribute__ ((noinline)) void
11
foo (unsigned short *src, unsigned int *dst)
12
{
13
  int i;
14
  unsigned short b, *s = src;
15
  unsigned int *d = dst;
16
 
17
  for (i = 0; i < N; i++)
18
    {
19
      b = *s++;
20
      *d = b << C;
21
      d++;
22
    }
23
 
24
  s = src;
25
  d = dst;
26
  for (i = 0; i < N; i++)
27
    {
28
      b = *s++;
29
      if (*d != b << C)
30
        abort ();
31
      d++;
32
    }
33
}
34
 
35
int main (void)
36
{
37
  int i;
38
  unsigned short in[N];
39
  unsigned int out[N];
40
 
41
  check_vect ();
42
 
43
  for (i = 0; i < N; i++)
44
    {
45
      in[i] = i;
46
      out[i] = 255;
47
      __asm__ volatile ("");
48
    }
49
 
50
  foo (in, out);
51
 
52
  return 0;
53
}
54
 
55
/* { dg-final { scan-tree-dump-times "vect_recog_widen_shift_pattern: detected" 1 "vect" { target vect_widen_shift } } } */
56
/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
57
/* { dg-final { cleanup-tree-dump "vect" } } */
58
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.