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[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.target/] [arm/] [neon/] [vld1f32.c] - Blame information for rev 691

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/* Test the `vld1f32' ARM Neon intrinsic.  */
/* This file was autogenerated by neon-testgen.  */
 
/* { dg-do assemble } */
/* { dg-require-effective-target arm_neon_ok } */
/* { dg-options "-save-temps -O0" } */
/* { dg-add-options arm_neon } */
 
#include "arm_neon.h"
 
void test_vld1f32 (void)
{
  float32x2_t out_float32x2_t;
 
  out_float32x2_t = vld1_f32 (0);
}
 
/* { dg-final { scan-assembler "vld1\.32\[      \]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[      \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
/* { dg-final { cleanup-saved-temps } } */

Line No.	Rev	Author	Line
1	691	jeremybenn	/* Test the `vld1f32' ARM Neon intrinsic. */
2			`/* This file was autogenerated by neon-testgen. */`
3
4			`/* { dg-do assemble } */`
5			`/* { dg-require-effective-target arm_neon_ok } */`
6			`/* { dg-options "-save-temps -O0" } */`
7			`/* { dg-add-options arm_neon } */`
8
9			`#include "arm_neon.h"`
10
11			`void test_vld1f32 (void)`
12			`{`
13			`float32x2_t out_float32x2_t;`
14
15			`out_float32x2_t = vld1_f32 (0);`
16			`}`
17
18			`/* { dg-final { scan-assembler "vld1\.32\[ \]+((\\\{\[dD\]\[0-9\]+\\\})\|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\(:\[0-9\]+\)?\\\]!?\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */`
19			`/* { dg-final { cleanup-saved-temps } } */`

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[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.target/] [arm/] [neon/] [vld1f32.c] - Blame information for rev 691