OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.target/] [arm/] [neon-vbicu64.c] - Blame information for rev 801

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 691 jeremybenn
/* Test the `vbic_u64' ARM Neon intrinsic.  */
2
 
3
/* { dg-do run } */
4
/* { dg-require-effective-target arm_neon_hw } */
5
/* { dg-options "-O0" } */
6
/* { dg-add-options arm_neon } */
7
 
8
#include "arm_neon.h"
9
#include <stdlib.h>
10
 
11
int main (void)
12
{
13
  uint64x1_t out_uint64x1_t = 0;
14
  uint64x1_t arg0_uint64x1_t = (uint64x1_t)0xdeadbeef00000000LL;
15
  uint64x1_t arg1_uint64x1_t = (uint64x1_t)(~0xdead00000000beefLL);
16
 
17
  out_uint64x1_t = vbic_u64 (arg0_uint64x1_t, arg1_uint64x1_t);
18
  if (out_uint64x1_t != (uint64x1_t)0xdead000000000000LL)
19
    abort();
20
  return 0;
21
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.