OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.target/] [arm/] [neon-vdupQ_laneu64.c] - Blame information for rev 691

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 691 jeremybenn
/* Test the `vdupq_laneu64' ARM Neon intrinsic.  */
2
 
3
/* { dg-do run } */
4
/* { dg-require-effective-target arm_neon_hw } */
5
/* { dg-options "-O0" } */
6
/* { dg-add-options arm_neon } */
7
 
8
#include "arm_neon.h"
9
#include <stdlib.h>
10
 
11
int main (void)
12
{
13
  uint64x2_t out_uint64x2_t = {0, 0};
14
  uint64_t arg0_uint64_t = (uint64_t) 0xdeadbeef;
15
 
16
  out_uint64x2_t = vdupq_lane_u64 ((uint64x1_t)arg0_uint64_t, 0);
17
  if (vgetq_lane_u64 (out_uint64x2_t, 0) != arg0_uint64_t)
18
    abort();
19
  if (vgetq_lane_u64 (out_uint64x2_t, 1) != arg0_uint64_t)
20
    abort();
21
  return 0;
22
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.