URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.target/] [arm/] [pr43920-1.c] - Blame information for rev 691

Details | Compare with Previous | View Log


/* { dg-do compile } */
/* { dg-options "-mthumb -Os" }  */
/* { dg-require-effective-target arm_thumb2_ok } */
 
int
f (int start, int end, int *start_)
{
  if (start == -1 || end == -1)
    return -1;
 
  if (end - start)
    return -1;
 
  *start_ = start;
 
  return 0;
}
 
/* { dg-final { scan-assembler-times "\torr" 0 } } */
/* { dg-final { scan-assembler-times "\tit\t" 0 } } */
/* { dg-final { scan-assembler "\tbeq" } } */

Line No.	Rev	Author	Line
1	691	jeremybenn	`/* { dg-do compile } */`
2			`/* { dg-options "-mthumb -Os" } */`
3			`/* { dg-require-effective-target arm_thumb2_ok } */`
4
5			`int`
6			`f (int start, int end, int *start_)`
7			`{`
8			`if (start == -1 \|\| end == -1)`
9			`return -1;`
10
11			`if (end - start)`
12			`return -1;`
13
14			`*start_ = start;`
15
16			`return 0;`
17			`}`
18
19			`/* { dg-final { scan-assembler-times "\torr" 0 } } */`
20			`/* { dg-final { scan-assembler-times "\tit\t" 0 } } */`
21			`/* { dg-final { scan-assembler "\tbeq" } } */`

Browse

Tools

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.target/] [arm/] [pr43920-1.c] - Blame information for rev 691