OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.target/] [arm/] [pr49641.c] - Blame information for rev 714

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 691 jeremybenn
/* { dg-do compile } */
2
/* { dg-options "-mthumb -O2" } */
3
/* { dg-require-effective-target arm_thumb1_ok } */
4
/* { dg-final { scan-assembler-not "stmia\[\\t \]*r3!\[^\\n]*r3" } } */
5
typedef struct {
6
  void *t1, *t2, *t3;
7
} z;
8
extern volatile int y;
9
static inline void foo(z *x) {
10
  x->t1 = &x->t2;
11
  x->t2 = ((void *)0);
12
  x->t3 = &x->t1;
13
}
14
extern z v;
15
void bar (void) {
16
   y = 0;
17
   foo(&v);
18
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.