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[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.target/] [arm/] [vfp-1.c] - Blame information for rev 708

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Line No. Rev Author Line
1 691 jeremybenn
/* { dg-do compile } */
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/* { dg-options "-O2 -mfpu=vfp -mfloat-abi=softfp" } */
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/* { dg-require-effective-target arm_vfp_ok } */
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extern float fabsf (float);
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extern float sqrtf (float);
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extern double fabs (double);
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extern double sqrt (double);
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volatile float f1, f2, f3;
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void test_sf() {
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  /* abssf2_vfp */
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  /* { dg-final { scan-assembler "fabss" } } */
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  f1 = fabsf (f1);
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  /* negsf2_vfp */
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  /* { dg-final { scan-assembler "fnegs" } } */
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  f1 = -f1;
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  /* addsf3_vfp */
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  /* { dg-final { scan-assembler "fadds" } } */
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  f1 = f2 + f3;
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  /* subsf3_vfp */
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  /* { dg-final { scan-assembler "fsubs" } } */
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  f1 = f2 - f3;
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  /* divsf3_vfp */
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  /* { dg-final { scan-assembler "fdivs" } } */
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  f1 = f2 / f3;
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  /* mulsf3_vfp */
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  /* { dg-final { scan-assembler "fmuls" } } */
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  f1 = f2 * f3;
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  /* mulsf3negsf_vfp */
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  /* { dg-final { scan-assembler "fnmuls" } } */
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  f1 = -f2 * f3;
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  /* mulsf3addsf_vfp */
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  /* { dg-final { scan-assembler "fmacs" } } */
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  f1 = f2 * f3 + f1;
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  /* mulsf3subsf_vfp */
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  /* { dg-final { scan-assembler "fmscs" } } */
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  f1 = f2 * f3 - f1;
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  /* mulsf3negsfaddsf_vfp */
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  /* { dg-final { scan-assembler "fnmacs" } } */
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  f1 = f2 - f3 * f1;
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  /* mulsf3negsfsubsf_vfp */
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  /* { dg-final { scan-assembler "fnmscs" } } */
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  f1 = -f2 * f3 - f1;
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  /* sqrtsf2_vfp */
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  /* { dg-final { scan-assembler "fsqrts" } } */
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  f1 = sqrtf (f1);
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}
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volatile double d1, d2, d3;
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void test_df() {
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  /* absdf2_vfp */
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  /* { dg-final { scan-assembler "fabsd" } } */
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  d1 = fabs (d1);
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  /* negdf2_vfp */
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  /* { dg-final { scan-assembler "fnegd" } } */
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  d1 = -d1;
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  /* adddf3_vfp */
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  /* { dg-final { scan-assembler "faddd" } } */
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  d1 = d2 + d3;
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  /* subdf3_vfp */
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  /* { dg-final { scan-assembler "fsubd" } } */
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  d1 = d2 - d3;
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  /* divdf3_vfp */
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  /* { dg-final { scan-assembler "fdivd" } } */
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  d1 = d2 / d3;
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  /* muldf3_vfp */
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  /* { dg-final { scan-assembler "fmuld" } } */
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  d1 = d2 * d3;
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  /* muldf3negdf_vfp */
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  /* { dg-final { scan-assembler "fnmuld" } } */
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  d1 = -d2 * d3;
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  /* muldf3adddf_vfp */
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  /* { dg-final { scan-assembler "fmacd" } } */
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  d1 = d2 * d3 + d1;
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  /* muldf3subdf_vfp */
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  /* { dg-final { scan-assembler "fmscd" } } */
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  d1 = d2 * d3 - d1;
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  /* muldf3negdfadddf_vfp */
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  /* { dg-final { scan-assembler "fnmacd" } } */
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  d1 = d2 - d3 * d1;
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  /* muldf3negdfsubdf_vfp */
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  /* { dg-final { scan-assembler "fnmscd" } } */
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  d1 = -d2 * d3 - d1;
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  /* sqrtdf2_vfp */
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  /* { dg-final { scan-assembler "fsqrtd" } } */
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  d1 = sqrt (d1);
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}
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volatile int i1;
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volatile unsigned int u1;
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void test_convert () {
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  /* extendsfdf2_vfp */
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  /* { dg-final { scan-assembler "fcvtds" } } */
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  d1 = f1;
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  /* truncdfsf2_vfp */
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  /* { dg-final { scan-assembler "fcvtsd" } } */
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  f1 = d1;
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  /* truncsisf2_vfp */
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  /* { dg-final { scan-assembler "ftosizs" } } */
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  i1 = f1;
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  /* truncsidf2_vfp */
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  /* { dg-final { scan-assembler "ftosizd" } } */
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  i1 = d1;
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  /* fixuns_truncsfsi2 */
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  /* { dg-final { scan-assembler "ftouizs" } } */
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  u1 = f1;
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  /* fixuns_truncdfsi2 */
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  /* { dg-final { scan-assembler "ftouizd" } } */
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  u1 = d1;
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  /* floatsisf2_vfp */
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  /* { dg-final { scan-assembler "fsitos" } } */
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  f1 = i1;
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  /* floatsidf2_vfp */
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  /* { dg-final { scan-assembler "fsitod" } } */
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  d1 = i1;
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  /* floatunssisf2 */
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  /* { dg-final { scan-assembler "fuitos" } } */
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  f1 = u1;
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  /* floatunssidf2 */
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  /* { dg-final { scan-assembler "fuitod" } } */
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  d1 = u1;
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}
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void test_ldst (float f[], double d[]) {
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  /* { dg-final { scan-assembler "flds.+ \\\[r0, #1020\\\]" } } */
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  /* { dg-final { scan-assembler "flds.+ \\\[r\[0-9\], #-1020\\\]" { target { arm32 && { ! arm_thumb2_ok } } } } } */
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  /* { dg-final { scan-assembler "add.+ r0, #1024" } } */
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  /* { dg-final { scan-assembler "fsts.+ \\\[r\[0-9\], #0\\\]\n" } } */
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  f[256] = f[255] + f[-255];
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  /* { dg-final { scan-assembler "fldd.+ \\\[r1, #1016\\\]" } } */
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  /* { dg-final { scan-assembler "fldd.+ \\\[r\[1-9\], #-1016\\\]" { target { arm32 && { ! arm_thumb2_ok } } } } } */
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  /* { dg-final { scan-assembler "fstd.+ \\\[r1, #256\\\]" } } */
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  d[32] = d[127] + d[-127];
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}

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