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[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.target/] [frv/] [fr450-builtins-6.c] - Blame information for rev 801

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/* Test a situation in which an M5 instruction (mrdacc) and M4 instruction
   (mqmulhu) can be issued together.  */
/* { dg-options "-mcpu=fr450" } */
/* { dg-do run } */
extern void abort (void);
extern void exit (int);
 
int
main ()
{
  __MQMULHU (0, 0x0011002200330044ULL, 0x0002000300040001ULL);
  __MQMULHU (8, 0x0100020003000400ULL, 0x0001000200030004ULL);
 
  /* 0x22 + 0x66 + 0xcc + 0x44 = 0x198 */
  /* 0x100 + 0x400 + 0x900 + 0x1000 = 0x1e00 */
  if (__MRDACC (0) + __MRDACC (1)
      + __MRDACC (2) + __MRDACC (3)
      + __MRDACC (8) + __MRDACC (9)
      + __MRDACC (10) + __MRDACC (11) != 0x1f98)
    abort ();
 
  exit (0);
}

Line No.	Rev	Author	Line
1	691	jeremybenn	`/* Test a situation in which an M5 instruction (mrdacc) and M4 instruction`
2			`(mqmulhu) can be issued together. */`
3			`/* { dg-options "-mcpu=fr450" } */`
4			`/* { dg-do run } */`
5			`extern void abort (void);`
6			`extern void exit (int);`
7
8			`int`
9			`main ()`
10			`{`
11			`__MQMULHU (0, 0x0011002200330044ULL, 0x0002000300040001ULL);`
12			`__MQMULHU (8, 0x0100020003000400ULL, 0x0001000200030004ULL);`
13
14			`/* 0x22 + 0x66 + 0xcc + 0x44 = 0x198 */`
15			`/* 0x100 + 0x400 + 0x900 + 0x1000 = 0x1e00 */`
16			`if (__MRDACC (0) + __MRDACC (1)`
17			`+ __MRDACC (2) + __MRDACC (3)`
18			`+ __MRDACC (8) + __MRDACC (9)`
19			`+ __MRDACC (10) + __MRDACC (11) != 0x1f98)`
20			`abort ();`
21
22			`exit (0);`
23			`}`

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[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.target/] [frv/] [fr450-builtins-6.c] - Blame information for rev 801