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[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.target/] [i386/] [20020201-3.c] - Blame information for rev 848

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Line No. Rev Author Line
1 691 jeremybenn
/* This testcase ICEd because a SFmode variable was given a MMX register
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   for which there is no movsf exists.  */
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/* { dg-do compile } */
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/* { dg-require-effective-target ia32 } */
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/* { dg-options "-O2 -march=i686 -mmmx -fno-strict-aliasing" } */
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struct A { unsigned int a, b; };
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void foo (struct A *x, int y, int z)
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{
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   const float d = 1.0;
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   float e = (float) y + z;
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   x->a = *(unsigned int *) &d;
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   x->b = *(unsigned int *) &e;
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}

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