OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.target/] [i386/] [avx-vzeroupper-3.c] - Blame information for rev 705

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 691 jeremybenn
/* { dg-do run } */
2
/* { dg-require-effective-target avx } */
3
/* { dg-options "-O2 -mavx -mvzeroupper" } */
4
 
5
#include "avx-check.h"
6
 
7
int s[8] = {1, 2, 3, 4, 5, 6, 7, 8};
8
int d[8] = {11, 22, 33, 44, 55, 66, 77, 88};
9
 
10
void
11
__attribute__((noinline))
12
foo ()
13
{
14
  int i;
15
  for (i = 0; i < ARRAY_SIZE (d); i++)
16
    d[i] = s[i] + 0x1000;
17
}
18
 
19
static void
20
__attribute__((noinline))
21
bar (__m256i src)
22
{
23
  foo ();
24
  _mm256_storeu_si256 ((__m256i*) d, src);
25
  if (__builtin_memcmp (d, s, sizeof (d)))
26
    abort ();
27
}
28
 
29
static void
30
avx_test (void)
31
{
32
  __m256i src = _mm256_loadu_si256 ((__m256i*) s);
33
  bar (src);
34
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.