URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.target/] [i386/] [avx2-vphaddw-2.c] - Blame information for rev 695

Line No.	Rev	Author	Line
1	691	jeremybenn	`/* { dg-do run } */`
2			`/* { dg-options "-mavx2 -O2" } */`
3			`/* { dg-require-effective-target avx2 } */`
4
5			`#include "avx2-check.h"`
6			`#include "ssse3-vals.h"`
7
8			`static void`
9			`compute_phaddw256 (short i1, short i2, short *r)`
10			`{`
11			`int i;`
12
13			`for (i = 0; i < 4; i++)`
14			`r[i + 0] = i1[2 * i] + i1[2 * i + 1];`
15
16			`for (i = 0; i < 4; i++)`
17			`r[i + 4] = i2[2 * i] + i2[2 * i + 1];`
18
19			`for (i = 0; i < 4; i++)`
20			`r[i + 8] = i1[2 * i + 8] + i1[2 * i + 9];`
21
22			`for (i = 0; i < 4; i++)`
23			`r[i + 12] = i2[2 * i + 8] + i2[2 * i + 9];`
24			`}`
25
26			`static void`
27			`avx2_test (void)`
28			`{`
29			`union256i_w s1, s2, res;`
30			`short res_ref[16];`
31			`int i;`
32			`int fail = 0;`
33
34			`for (i = 0; i < 256; i += 16)`
35			`{`
36			`s1.x = _mm256_loadu_si256 ((__m256i *) & vals[i]);`
37			`s2.x = _mm256_loadu_si256 ((__m256i *) & vals[i + 8]);`
38
39			`res.x = _mm256_hadd_epi16 (s1.x, s2.x);`
40
41			`compute_phaddw256 (s1.a, s2.a, res_ref);`
42
43			`fail += check_union256i_w (res, res_ref);`
44			`}`
45
46			`if (fail != 0)`
47			`abort ();`
48			`}`