URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.target/] [i386/] [avx256-unaligned-load-5.c] - Blame information for rev 700

Line No.	Rev	Author	Line
1	691	jeremybenn	`/* { dg-do run } */`
2			`/* { dg-require-effective-target avx } */`
3			`/* { dg-options "-O3 -dp -mavx -mavx256-split-unaligned-load" } */`
4
5			`#include "avx-check.h"`
6
7			`#define N 8`
8
9			`float a[N+3] = { -1, -1, -1, 24.43, 68.346, 43.35,`
10			`546.46, 46.79, 82.78, 82.7, 9.4 };`
11			`float b[N];`
12			`float c[N];`
13
14			`void`
15			`foo (void)`
16			`{`
17			`int i;`
18
19			`for (i = 0; i < N; i++)`
20			`b[i] = a[i+3] * 2;`
21			`}`
22
23			`__attribute__ ((noinline))`
24			`float`
25			`bar (float x)`
26			`{`
27			`return x * 2;`
28			`}`
29
30			`void`
31			`avx_test (void)`
32			`{`
33			`int i;`
34
35			`foo ();`
36
37			`for (i = 0; i < N; i++)`
38			`c[i] = bar (a[i+3]);`
39
40			`for (i = 0; i < N; i++)`
41			`if (b[i] != c[i])`
42			`abort ();`
43			`}`