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jeremybenn |
/* Test whether using target specific options, we can generate FMA4 code. */
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/* { dg-do compile { target { ! { ia32 } } } } */
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/* { dg-options "-O2 -march=k8" } */
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extern void exit (int);
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#define FMA4_ATTR __attribute__((__target__("fma4")))
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extern float flt_mul_add (float a, float b, float c) FMA4_ATTR;
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extern float flt_mul_sub (float a, float b, float c) FMA4_ATTR;
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extern float flt_neg_mul_add (float a, float b, float c) FMA4_ATTR;
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extern float flt_neg_mul_sub (float a, float b, float c) FMA4_ATTR;
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extern double dbl_mul_add (double a, double b, double c) FMA4_ATTR;
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extern double dbl_mul_sub (double a, double b, double c) FMA4_ATTR;
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extern double dbl_neg_mul_add (double a, double b, double c) FMA4_ATTR;
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extern double dbl_neg_mul_sub (double a, double b, double c) FMA4_ATTR;
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float
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flt_mul_add (float a, float b, float c)
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{
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return (a * b) + c;
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}
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double
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dbl_mul_add (double a, double b, double c)
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{
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return (a * b) + c;
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}
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float
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flt_mul_sub (float a, float b, float c)
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{
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return (a * b) - c;
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}
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double
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dbl_mul_sub (double a, double b, double c)
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{
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return (a * b) - c;
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}
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float
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flt_neg_mul_add (float a, float b, float c)
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{
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return (-(a * b)) + c;
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}
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double
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dbl_neg_mul_add (double a, double b, double c)
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{
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return (-(a * b)) + c;
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}
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float
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flt_neg_mul_sub (float a, float b, float c)
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{
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return (-(a * b)) - c;
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}
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double
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dbl_neg_mul_sub (double a, double b, double c)
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{
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return (-(a * b)) - c;
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}
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float f[10] = { 2, 3, 4 };
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double d[10] = { 2, 3, 4 };
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int main ()
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{
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f[3] = flt_mul_add (f[0], f[1], f[2]);
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f[4] = flt_mul_sub (f[0], f[1], f[2]);
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f[5] = flt_neg_mul_add (f[0], f[1], f[2]);
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f[6] = flt_neg_mul_sub (f[0], f[1], f[2]);
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d[3] = dbl_mul_add (d[0], d[1], d[2]);
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d[4] = dbl_mul_sub (d[0], d[1], d[2]);
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d[5] = dbl_neg_mul_add (d[0], d[1], d[2]);
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d[6] = dbl_neg_mul_sub (d[0], d[1], d[2]);
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exit (0);
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}
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/* { dg-final { scan-assembler "vfmaddss" } } */
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/* { dg-final { scan-assembler "vfmaddsd" } } */
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/* { dg-final { scan-assembler "vfmsubss" } } */
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/* { dg-final { scan-assembler "vfmsubsd" } } */
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/* { dg-final { scan-assembler "vfnmaddss" } } */
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/* { dg-final { scan-assembler "vfnmaddsd" } } */
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/* { dg-final { scan-assembler "vfnmsubss" } } */
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/* { dg-final { scan-assembler "vfnmsubsd" } } */
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/* { dg-final { scan-assembler "call\t(.*)flt_mul_add" } } */
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/* { dg-final { scan-assembler "call\t(.*)flt_mul_sub" } } */
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/* { dg-final { scan-assembler "call\t(.*)flt_neg_mul_add" } } */
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/* { dg-final { scan-assembler "call\t(.*)flt_neg_mul_sub" } } */
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/* { dg-final { scan-assembler "call\t(.*)dbl_mul_add" } } */
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/* { dg-final { scan-assembler "call\t(.*)dbl_mul_sub" } } */
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/* { dg-final { scan-assembler "call\t(.*)dbl_neg_mul_add" } } */
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/* { dg-final { scan-assembler "call\t(.*)dbl_neg_mul_sub" } } */
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