URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.target/] [i386/] [i386.exp] - Blame information for rev 696

Go to most recent revision | Details | Compare with Previous | View Log


# Copyright (C) 1997, 2004, 2007, 2008, 2009, 2010
# Free Software Foundation, Inc.
 
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 3 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with GCC; see the file COPYING3.  If not see
# .
 
# GCC testsuite that uses the `dg.exp' driver.
 
# Exit immediately if this isn't a x86 target.
if { ![istarget i?86*-*-*] && ![istarget x86_64-*-*] } then {
  return
}
 
# Load support procs.
load_lib gcc-dg.exp
 
# Return 1 if attribute ms_hook_prologue is supported.
proc check_effective_target_ms_hook_prologue { } {
    if { [check_no_compiler_messages ms_hook_prologue object {
             void __attribute__ ((__ms_hook_prologue__)) foo ();
         } ""] } {
        return 1
    } else {
        return 0
    }
}
 
# Return 1 if 3dnow instructions can be compiled.
proc check_effective_target_3dnow { } {
    return [check_no_compiler_messages 3dnow object {
        typedef int __m64 __attribute__ ((__vector_size__ (8)));
        typedef float __v2sf __attribute__ ((__vector_size__ (8)));
 
        __m64 _m_pfadd (__m64 __A, __m64 __B)
        {
            return (__m64) __builtin_ia32_pfadd ((__v2sf)__A, (__v2sf)__B);
        }
    } "-O2 -m3dnow" ]
}
 
# Return 1 if sse3 instructions can be compiled.
proc check_effective_target_sse3 { } {
    return [check_no_compiler_messages sse3 object {
        typedef double __m128d __attribute__ ((__vector_size__ (16)));
        typedef double __v2df __attribute__ ((__vector_size__ (16)));
 
        __m128d _mm_addsub_pd (__m128d __X, __m128d __Y)
        {
            return (__m128d) __builtin_ia32_addsubpd ((__v2df)__X, (__v2df)__Y);
        }
    } "-O2 -msse3" ]
}
 
# Return 1 if ssse3 instructions can be compiled.
proc check_effective_target_ssse3 { } {
    return [check_no_compiler_messages ssse3 object {
        typedef long long __m128i __attribute__ ((__vector_size__ (16)));
        typedef int __v4si __attribute__ ((__vector_size__ (16)));
 
        __m128i _mm_abs_epi32 (__m128i __X)
        {
            return (__m128i) __builtin_ia32_pabsd128 ((__v4si)__X);
        }
    } "-O2 -mssse3" ]
}
 
# Return 1 if sse4 instructions can be compiled.
proc check_effective_target_sse4 { } {
    return [check_no_compiler_messages sse4.1 object {
        typedef long long __m128i __attribute__ ((__vector_size__ (16)));
        typedef int __v4si __attribute__ ((__vector_size__ (16)));
 
        __m128i _mm_mullo_epi32 (__m128i __X, __m128i __Y)
        {
            return (__m128i) __builtin_ia32_pmulld128 ((__v4si)__X,
                                                       (__v4si)__Y);
        }
    } "-O2 -msse4.1" ]
}
 
# Return 1 if aes instructions can be compiled.
proc check_effective_target_aes { } {
    return [check_no_compiler_messages aes object {
        typedef long long __m128i __attribute__ ((__vector_size__ (16)));
        typedef long long __v2di __attribute__ ((__vector_size__ (16)));
 
        __m128i _mm_aesimc_si128 (__m128i __X)
        {
            return (__m128i) __builtin_ia32_aesimc128 ((__v2di)__X);
        }
    } "-O2 -maes" ]
}
 
# Return 1 if vaes instructions can be compiled.
proc check_effective_target_vaes { } {
    return [check_no_compiler_messages vaes object {
        typedef long long __m128i __attribute__ ((__vector_size__ (16)));
        typedef long long __v2di __attribute__ ((__vector_size__ (16)));
 
        __m128i _mm_aesimc_si128 (__m128i __X)
        {
            return (__m128i) __builtin_ia32_aesimc128 ((__v2di)__X);
        }
    } "-O2 -maes -mavx" ]
}
 
# Return 1 if pclmul instructions can be compiled.
proc check_effective_target_pclmul { } {
    return [check_no_compiler_messages pclmul object {
        typedef long long __m128i __attribute__ ((__vector_size__ (16)));
        typedef long long __v2di __attribute__ ((__vector_size__ (16)));
 
        __m128i pclmulqdq_test (__m128i __X, __m128i __Y)
        {
            return (__m128i) __builtin_ia32_pclmulqdq128 ((__v2di)__X,
                                                          (__v2di)__Y,
                                                          1);
        }
    } "-O2 -mpclmul" ]
}
 
# Return 1 if vpclmul instructions can be compiled.
proc check_effective_target_vpclmul { } {
    return [check_no_compiler_messages vpclmul object {
        typedef long long __m128i __attribute__ ((__vector_size__ (16)));
        typedef long long __v2di __attribute__ ((__vector_size__ (16)));
 
        __m128i pclmulqdq_test (__m128i __X, __m128i __Y)
        {
            return (__m128i) __builtin_ia32_pclmulqdq128 ((__v2di)__X,
                                                          (__v2di)__Y,
                                                          1);
        }
    } "-O2 -mpclmul -mavx" ]
}
 
# Return 1 if sse4a instructions can be compiled.
proc check_effective_target_sse4a { } {
    return [check_no_compiler_messages sse4a object {
        typedef long long __m128i __attribute__ ((__vector_size__ (16)));
        typedef long long __v2di __attribute__ ((__vector_size__ (16)));
 
        __m128i _mm_insert_si64 (__m128i __X,__m128i __Y)
        {
            return (__m128i) __builtin_ia32_insertq ((__v2di)__X, (__v2di)__Y);
        }
    } "-O2 -msse4a" ]
}
 
# Return 1 if fma4 instructions can be compiled.
proc check_effective_target_fma4 { } {
    return [check_no_compiler_messages fma4 object {
        typedef float __m128 __attribute__ ((__vector_size__ (16)));
        typedef float __v4sf __attribute__ ((__vector_size__ (16)));
        __m128 _mm_macc_ps(__m128 __A, __m128 __B, __m128 __C)
        {
            return (__m128) __builtin_ia32_vfmaddps ((__v4sf)__A,
                                                     (__v4sf)__B,
                                                     (__v4sf)__C);
        }
    } "-O2 -mfma4" ]
}
 
# Return 1 if fma instructions can be compiled.
proc check_effective_target_fma { } {
    return [check_no_compiler_messages fma object {
        typedef float __m128 __attribute__ ((__vector_size__ (16)));
        typedef float __v4sf __attribute__ ((__vector_size__ (16)));
        __m128 _mm_macc_ps(__m128 __A, __m128 __B, __m128 __C)
        {
            return (__m128) __builtin_ia32_vfmaddps ((__v4sf)__A,
                                                     (__v4sf)__B,
                                                     (__v4sf)__C);
        }
    } "-O2 -mfma" ]
}
 
# Return 1 if xop instructions can be compiled.
proc check_effective_target_xop { } {
    return [check_no_compiler_messages xop object {
        typedef long long __m128i __attribute__ ((__vector_size__ (16)));
        typedef short __v8hi __attribute__ ((__vector_size__ (16)));
        __m128i _mm_maccs_epi16(__m128i __A, __m128i __B, __m128i __C)
        {
            return (__m128i) __builtin_ia32_vpmacssww ((__v8hi)__A,
                                                       (__v8hi)__B,
                                                       (__v8hi)__C);
        }
    } "-O2 -mxop" ]
}
 
# Return 1 if lzcnt instruction can be compiled.
proc check_effective_target_lzcnt { } {
    return [check_no_compiler_messages lzcnt object {
        unsigned short _lzcnt (unsigned short __X)
        {
           return __builtin_clzs (__X);
        }
    } "-mlzcnt" ]
}
 
# Return 1 if avx2 instructions can be compiled.
proc check_effective_target_avx2 { } {
    return [check_no_compiler_messages avx2 object {
        typedef long long __v4di __attribute__ ((__vector_size__ (32)));
        __v4di
        mm256_is32_andnotsi256  (__v4di __X, __v4di __Y)
        {
           return __builtin_ia32_andnotsi256 (__X, __Y);
        }
    } "-O0 -mavx2" ]
}
 
# Return 1 if bmi instructions can be compiled.
proc check_effective_target_bmi { } {
    return [check_no_compiler_messages bmi object {
        unsigned int __bextr_u32 (unsigned int __X, unsigned int __Y)
        {
          return __builtin_ia32_bextr_u32 (__X, __Y);
        }
    } "-mbmi" ]
}
 
# Return 1 if bmi2 instructions can be compiled.
proc check_effective_target_bmi2 { } {
    return [check_no_compiler_messages bmi2 object {
        unsigned int
        _bzhi_u32 (unsigned int __X, unsigned int __Y)
        {
            return __builtin_ia32_bzhi_si (__X, __Y);
        }
    } "-mbmi2" ]
}
 
# If the linker used understands -M , pass it to clear hardware
# capabilities set by the Sun assembler.
set clearcap_ldflags "-Wl,-M,$srcdir/$subdir/clearcap.map"
 
if [check_no_compiler_messages mapfile executable {
        int main (void) { return 0; }
  } $clearcap_ldflags ] {
 
  if { [info procs gcc_target_compile] != [list] \
        && [info procs saved_gcc_target_compile] == [list] } {
    rename gcc_target_compile saved_gcc_target_compile
 
    proc gcc_target_compile { source dest type options } {
      global clearcap_ldflags
      # Always pass -Wl,-M,, but don't let it show up in gcc.sum.
      lappend options "additional_flags=$clearcap_ldflags"
 
      return [saved_gcc_target_compile $source $dest $type $options]
    }
  }
}
 
# If a testcase doesn't have special options, use these.
global DEFAULT_CFLAGS
if ![info exists DEFAULT_CFLAGS] then {
    set DEFAULT_CFLAGS " -ansi -pedantic-errors"
}
 
# Initialize `dg'.
dg-init
 
# Special case compilation of vect-args.c so we don't have to
# replicate it 10 times.
foreach type { "" -mmmx -m3dnow -msse -msse2 } {
  foreach level { "" -O } {
    set flags "$type $level"
    verbose -log "Testing vect-args, $flags" 1
    dg-test $srcdir/$subdir/vect-args.c $flags ""
  }
}
 
# Everything else.
set tests [lsort [glob -nocomplain $srcdir/$subdir/*.\[cS\]]]
set tests [prune $tests $srcdir/$subdir/vect-args.c]
 
# Main loop.
dg-runtest $tests "" $DEFAULT_CFLAGS
 
# All done.
dg-finish

Browse

Tools

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.target/] [i386/] [i386.exp] - Blame information for rev 696

Line No.	Rev	Author	Line
1	691	jeremybenn	`# Copyright (C) 1997, 2004, 2007, 2008, 2009, 2010`
2			`# Free Software Foundation, Inc.`
3
4			`# This program is free software; you can redistribute it and/or modify`
5			`# it under the terms of the GNU General Public License as published by`
6			`# the Free Software Foundation; either version 3 of the License, or`
7			`# (at your option) any later version.`
8			`#`
9			`# This program is distributed in the hope that it will be useful,`
10			`# but WITHOUT ANY WARRANTY; without even the implied warranty of`
11			`# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the`
12			`# GNU General Public License for more details.`
13			`#`
14			`# You should have received a copy of the GNU General Public License`
15			`# along with GCC; see the file COPYING3. If not see`
16			`# .`
17
18			# GCC testsuite that uses the `dg.exp' driver.
19
20			`# Exit immediately if this isn't a x86 target.`
21			`if { ![istarget i?86--] && ![istarget x86_64--*] } then {`
22			`return`
23			`}`
24
25			`# Load support procs.`
26			`load_lib gcc-dg.exp`
27
28			`# Return 1 if attribute ms_hook_prologue is supported.`
29			`proc check_effective_target_ms_hook_prologue { } {`
30			`if { [check_no_compiler_messages ms_hook_prologue object {`
31			`void __attribute__ ((__ms_hook_prologue__)) foo ();`
32			`} ""] } {`
33			`return 1`
34			`} else {`
35			`return 0`
36			`}`
37			`}`
38
39			`# Return 1 if 3dnow instructions can be compiled.`
40			`proc check_effective_target_3dnow { } {`
41			`return [check_no_compiler_messages 3dnow object {`
42			`typedef int __m64 __attribute__ ((__vector_size__ (8)));`
43			`typedef float __v2sf __attribute__ ((__vector_size__ (8)));`
44
45			`__m64 _m_pfadd (__m64 __A, __m64 __B)`
46			`{`
47			`return (__m64) __builtin_ia32_pfadd ((__v2sf)__A, (__v2sf)__B);`
48			`}`
49			`} "-O2 -m3dnow" ]`
50			`}`
51
52			`# Return 1 if sse3 instructions can be compiled.`
53			`proc check_effective_target_sse3 { } {`
54			`return [check_no_compiler_messages sse3 object {`
55			`typedef double __m128d __attribute__ ((__vector_size__ (16)));`
56			`typedef double __v2df __attribute__ ((__vector_size__ (16)));`
57
58			`__m128d _mm_addsub_pd (__m128d __X, __m128d __Y)`
59			`{`
60			`return (__m128d) __builtin_ia32_addsubpd ((__v2df)__X, (__v2df)__Y);`
61			`}`
62			`} "-O2 -msse3" ]`
63			`}`
64
65			`# Return 1 if ssse3 instructions can be compiled.`
66			`proc check_effective_target_ssse3 { } {`
67			`return [check_no_compiler_messages ssse3 object {`
68			`typedef long long __m128i __attribute__ ((__vector_size__ (16)));`
69			`typedef int __v4si __attribute__ ((__vector_size__ (16)));`
70
71			`__m128i _mm_abs_epi32 (__m128i __X)`
72			`{`
73			`return (__m128i) __builtin_ia32_pabsd128 ((__v4si)__X);`
74			`}`
75			`} "-O2 -mssse3" ]`
76			`}`
77
78			`# Return 1 if sse4 instructions can be compiled.`
79			`proc check_effective_target_sse4 { } {`
80			`return [check_no_compiler_messages sse4.1 object {`
81			`typedef long long __m128i __attribute__ ((__vector_size__ (16)));`
82			`typedef int __v4si __attribute__ ((__vector_size__ (16)));`
83
84			`__m128i _mm_mullo_epi32 (__m128i __X, __m128i __Y)`
85			`{`
86			`return (__m128i) __builtin_ia32_pmulld128 ((__v4si)__X,`
87			`(__v4si)__Y);`
88			`}`
89			`} "-O2 -msse4.1" ]`
90			`}`
91
92			`# Return 1 if aes instructions can be compiled.`
93			`proc check_effective_target_aes { } {`
94			`return [check_no_compiler_messages aes object {`
95			`typedef long long __m128i __attribute__ ((__vector_size__ (16)));`
96			`typedef long long __v2di __attribute__ ((__vector_size__ (16)));`
97
98			`__m128i _mm_aesimc_si128 (__m128i __X)`
99			`{`
100			`return (__m128i) __builtin_ia32_aesimc128 ((__v2di)__X);`
101			`}`
102			`} "-O2 -maes" ]`
103			`}`
104
105			`# Return 1 if vaes instructions can be compiled.`
106			`proc check_effective_target_vaes { } {`
107			`return [check_no_compiler_messages vaes object {`
108			`typedef long long __m128i __attribute__ ((__vector_size__ (16)));`
109			`typedef long long __v2di __attribute__ ((__vector_size__ (16)));`
110
111			`__m128i _mm_aesimc_si128 (__m128i __X)`
112			`{`
113			`return (__m128i) __builtin_ia32_aesimc128 ((__v2di)__X);`
114			`}`
115			`} "-O2 -maes -mavx" ]`
116			`}`
117
118			`# Return 1 if pclmul instructions can be compiled.`
119			`proc check_effective_target_pclmul { } {`
120			`return [check_no_compiler_messages pclmul object {`
121			`typedef long long __m128i __attribute__ ((__vector_size__ (16)));`
122			`typedef long long __v2di __attribute__ ((__vector_size__ (16)));`
123
124			`__m128i pclmulqdq_test (__m128i __X, __m128i __Y)`
125			`{`
126			`return (__m128i) __builtin_ia32_pclmulqdq128 ((__v2di)__X,`
127			`(__v2di)__Y,`
128			`1);`
129			`}`
130			`} "-O2 -mpclmul" ]`
131			`}`
132
133			`# Return 1 if vpclmul instructions can be compiled.`
134			`proc check_effective_target_vpclmul { } {`
135			`return [check_no_compiler_messages vpclmul object {`
136			`typedef long long __m128i __attribute__ ((__vector_size__ (16)));`
137			`typedef long long __v2di __attribute__ ((__vector_size__ (16)));`
138
139			`__m128i pclmulqdq_test (__m128i __X, __m128i __Y)`
140			`{`
141			`return (__m128i) __builtin_ia32_pclmulqdq128 ((__v2di)__X,`
142			`(__v2di)__Y,`
143			`1);`
144			`}`
145			`} "-O2 -mpclmul -mavx" ]`
146			`}`
147
148			`# Return 1 if sse4a instructions can be compiled.`
149			`proc check_effective_target_sse4a { } {`
150			`return [check_no_compiler_messages sse4a object {`
151			`typedef long long __m128i __attribute__ ((__vector_size__ (16)));`
152			`typedef long long __v2di __attribute__ ((__vector_size__ (16)));`
153
154			`__m128i _mm_insert_si64 (__m128i __X,__m128i __Y)`
155			`{`
156			`return (__m128i) __builtin_ia32_insertq ((__v2di)__X, (__v2di)__Y);`
157			`}`
158			`} "-O2 -msse4a" ]`
159			`}`
160
161			`# Return 1 if fma4 instructions can be compiled.`
162			`proc check_effective_target_fma4 { } {`
163			`return [check_no_compiler_messages fma4 object {`
164			`typedef float __m128 __attribute__ ((__vector_size__ (16)));`
165			`typedef float __v4sf __attribute__ ((__vector_size__ (16)));`
166			`__m128 _mm_macc_ps(__m128 __A, __m128 __B, __m128 __C)`
167			`{`
168			`return (__m128) __builtin_ia32_vfmaddps ((__v4sf)__A,`
169			`(__v4sf)__B,`
170			`(__v4sf)__C);`
171			`}`
172			`} "-O2 -mfma4" ]`
173			`}`
174
175			`# Return 1 if fma instructions can be compiled.`
176			`proc check_effective_target_fma { } {`
177			`return [check_no_compiler_messages fma object {`
178			`typedef float __m128 __attribute__ ((__vector_size__ (16)));`
179			`typedef float __v4sf __attribute__ ((__vector_size__ (16)));`
180			`__m128 _mm_macc_ps(__m128 __A, __m128 __B, __m128 __C)`
181			`{`
182			`return (__m128) __builtin_ia32_vfmaddps ((__v4sf)__A,`
183			`(__v4sf)__B,`
184			`(__v4sf)__C);`
185			`}`
186			`} "-O2 -mfma" ]`
187			`}`
188
189			`# Return 1 if xop instructions can be compiled.`
190			`proc check_effective_target_xop { } {`
191			`return [check_no_compiler_messages xop object {`
192			`typedef long long __m128i __attribute__ ((__vector_size__ (16)));`
193			`typedef short __v8hi __attribute__ ((__vector_size__ (16)));`
194			`__m128i _mm_maccs_epi16(__m128i __A, __m128i __B, __m128i __C)`
195			`{`
196			`return (__m128i) __builtin_ia32_vpmacssww ((__v8hi)__A,`
197			`(__v8hi)__B,`
198			`(__v8hi)__C);`
199			`}`
200			`} "-O2 -mxop" ]`
201			`}`
202
203			`# Return 1 if lzcnt instruction can be compiled.`
204			`proc check_effective_target_lzcnt { } {`
205			`return [check_no_compiler_messages lzcnt object {`
206			`unsigned short _lzcnt (unsigned short __X)`
207			`{`
208			`return __builtin_clzs (__X);`
209			`}`
210			`} "-mlzcnt" ]`
211			`}`
212
213			`# Return 1 if avx2 instructions can be compiled.`
214			`proc check_effective_target_avx2 { } {`
215			`return [check_no_compiler_messages avx2 object {`
216			`typedef long long __v4di __attribute__ ((__vector_size__ (32)));`
217			`__v4di`
218			`mm256_is32_andnotsi256 (__v4di __X, __v4di __Y)`
219			`{`
220			`return __builtin_ia32_andnotsi256 (__X, __Y);`
221			`}`
222			`} "-O0 -mavx2" ]`
223			`}`
224
225			`# Return 1 if bmi instructions can be compiled.`
226			`proc check_effective_target_bmi { } {`
227			`return [check_no_compiler_messages bmi object {`
228			`unsigned int __bextr_u32 (unsigned int __X, unsigned int __Y)`
229			`{`
230			`return __builtin_ia32_bextr_u32 (__X, __Y);`
231			`}`
232			`} "-mbmi" ]`
233			`}`
234
235			`# Return 1 if bmi2 instructions can be compiled.`
236			`proc check_effective_target_bmi2 { } {`
237			`return [check_no_compiler_messages bmi2 object {`
238			`unsigned int`
239			`_bzhi_u32 (unsigned int __X, unsigned int __Y)`
240			`{`
241			`return __builtin_ia32_bzhi_si (__X, __Y);`
242			`}`
243			`} "-mbmi2" ]`
244			`}`
245
246			`# If the linker used understands -M , pass it to clear hardware`
247			`# capabilities set by the Sun assembler.`
248			`set clearcap_ldflags "-Wl,-M,$srcdir/$subdir/clearcap.map"`
249
250			`if [check_no_compiler_messages mapfile executable {`
251			`int main (void) { return 0; }`
252			`} $clearcap_ldflags ] {`
253
254			`if { [info procs gcc_target_compile] != [list] \`
255			`&& [info procs saved_gcc_target_compile] == [list] } {`
256			`rename gcc_target_compile saved_gcc_target_compile`
257
258			`proc gcc_target_compile { source dest type options } {`
259			`global clearcap_ldflags`
260			`# Always pass -Wl,-M,, but don't let it show up in gcc.sum.`
261			`lappend options "additional_flags=$clearcap_ldflags"`
262
263			`return [saved_gcc_target_compile $source $dest $type $options]`
264			`}`
265			`}`
266			`}`
267
268			`# If a testcase doesn't have special options, use these.`
269			`global DEFAULT_CFLAGS`
270			`if ![info exists DEFAULT_CFLAGS] then {`
271			`set DEFAULT_CFLAGS " -ansi -pedantic-errors"`
272			`}`
273
274			# Initialize `dg'.
275			`dg-init`
276
277			`# Special case compilation of vect-args.c so we don't have to`
278			`# replicate it 10 times.`
279			`foreach type { "" -mmmx -m3dnow -msse -msse2 } {`
280			`foreach level { "" -O } {`
281			`set flags "$type $level"`
282			`verbose -log "Testing vect-args, $flags" 1`
283			`dg-test $srcdir/$subdir/vect-args.c $flags ""`
284			`}`
285			`}`
286
287			`# Everything else.`
288			`set tests [lsort [glob -nocomplain $srcdir/$subdir/*.\[cS\]]]`
289			`set tests [prune $tests $srcdir/$subdir/vect-args.c]`
290
291			`# Main loop.`
292			`dg-runtest $tests "" $DEFAULT_CFLAGS`
293
294			`# All done.`
295			`dg-finish`