URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.target/] [i386/] [incoming-3.c] - Blame information for rev 848

Go to most recent revision | Details | Compare with Previous | View Log


/* PR middle-end/37009 */
/* { dg-do compile { target { { ! *-*-darwin* } && ia32 } } } */
/* { dg-options "-w -msse2 -mpreferred-stack-boundary=2" } */
 
#include <emmintrin.h>
 
extern void bar (int *);
 
int
foo(__m128 y, int size, ...)
{
  int __attribute((aligned(16))) xxx;
 
  xxx = 2;
  bar (&xxx);
  return size;
}
 
/* { dg-final { scan-assembler-not "and\[l\]\[ \t\]" } } */

Line No.	Rev	Author	Line
1	691	jeremybenn	`/* PR middle-end/37009 */`
2			`/* { dg-do compile { target { { ! --darwin* } && ia32 } } } */`
3			`/* { dg-options "-w -msse2 -mpreferred-stack-boundary=2" } */`
4
5			`#include <emmintrin.h>`
6
7			`extern void bar (int *);`
8
9			`int`
10			`foo(__m128 y, int size, ...)`
11			`{`
12			`int __attribute((aligned(16))) xxx;`
13
14			`xxx = 2;`
15			`bar (&xxx);`
16			`return size;`
17			`}`
18
19			`/* { dg-final { scan-assembler-not "and\[l\]\[ \t\]" } } */`

Browse

Tools

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.target/] [i386/] [incoming-3.c] - Blame information for rev 848