OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.target/] [i386/] [pr30505.c] - Blame information for rev 691

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 691 jeremybenn
/* PR inline-asm/30505 */
2
/* { dg-do compile } */
3
/* { dg-require-effective-target ia32 } */
4
/* { dg-options "-O2" } */
5
 
6
unsigned long long a, c;
7
unsigned int b, d;
8
 
9
void
10
test ()
11
{
12
  unsigned int e, f;
13
 
14
  __asm__ ("divl %5;movl %1, %0;movl %4, %1;divl %5"
15
           : "=&rm" (e), "=a" (f), "=d" (d)
16
           : "1" ((unsigned int) (a >> 32)), "g" ((unsigned int) a),
17
             "rm" (b), "2" (0)
18
           : "cc");
19
  c = (unsigned long long) e << 32 | f;
20
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.