OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.target/] [i386/] [pr43067.c] - Blame information for rev 691

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 691 jeremybenn
/* { dg-do compile } */
2
/* { dg-options "-O1 -mxop -ftree-vectorize -fschedule-insns" } */
3
 
4
union {
5
  int i32[10240];
6
  long long i64[10240];
7
} a, b, c;
8
 
9
void imul32_to_64 (void)
10
{
11
  int i;
12
 
13
  for (i = 0; i < 10240; i++)
14
    a.i64[i] = (long long) b.i32[i] * c.i32[i];
15
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.