OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.target/] [i386/] [pr43107.c] - Blame information for rev 691

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 691 jeremybenn
/* PR target/43107 */
2
/* { dg-do compile } */
3
/* { dg-options "-O3 -mavx" } */
4
 
5
extern void bar (float b[4][4]);
6
 
7
void
8
foo ()
9
{
10
  float a[4][4], b[4][4];
11
  int i, j;
12
  for (i = 0; i < 4; i++)
13
    {
14
      for (j = 0; j < 4; j++)
15
        a[i][j] = 0;
16
      for (j = 0; j < 4; j++)
17
        b[i][j] = a[i][j];
18
    }
19
  bar (b);
20
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.