OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.target/] [i386/] [pr45336-2.c] - Blame information for rev 691

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 691 jeremybenn
/* PR target/45336 */
2
/* { dg-do compile { target { ! { ia32 } } } } */
3
/* { dg-options "-O2 -msse4 -mtune=generic" } */
4
/* { dg-final { scan-assembler-not "movsbl" } } */
5
/* { dg-final { scan-assembler-not "movswl" } } */
6
/* { dg-final { scan-assembler-not "movzbl" } } */
7
/* { dg-final { scan-assembler-not "movzwl" } } */
8
/* { dg-final { scan-assembler-not "cwtl" } } */
9
/* { dg-final { scan-assembler-not "cltq" } } */
10
/* { dg-final { scan-assembler "pextrb" } } */
11
/* { dg-final { scan-assembler "pextrw" } } */
12
/* { dg-final { scan-assembler "pextrd" { target { ! x86_64-*-mingw* } } } } */
13
 
14
#include <smmintrin.h>
15
unsigned long long int foo8(__m128i x) { return _mm_extract_epi8(x, 4); }
16
unsigned long long int foo16(__m128i x) { return _mm_extract_epi16(x, 3); }
17
unsigned long long int foo32(__m128i x)
18
{
19
  return (unsigned int) _mm_extract_epi32(x, 2);
20
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.