OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.target/] [i386/] [sse2-cvttsd2si-2.c] - Blame information for rev 762

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 691 jeremybenn
/* { dg-do run { target { ! { ia32 } } } } */
2
/* { dg-require-effective-target sse2 } */
3
/* { dg-options "-O2 -msse2" } */
4
 
5
#ifndef CHECK_H
6
#define CHECK_H "sse2-check.h"
7
#endif
8
 
9
#ifndef TEST
10
#define TEST sse2_test
11
#endif
12
 
13
#include CHECK_H
14
 
15
#include <emmintrin.h>
16
 
17
static long long
18
__attribute__((noinline, unused))
19
test (__m128d p)
20
{
21
  return _mm_cvttsd_si64 (p);
22
}
23
 
24
static void
25
TEST (void)
26
{
27
  union128d s;
28
  long long e;
29
  long long d;
30
 
31
  s.x = _mm_set_pd (123.321, 42949672339501.4);
32
 
33
  d = test (s.x);
34
  e = (long long)(s.a[0]);
35
 
36
  if (d != e)
37
    abort ();
38
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.