OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.target/] [i386/] [sse2-extract-1.c] - Blame information for rev 695

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 691 jeremybenn 
/* { dg-do run } */
2 
/* { dg-options "-O2 -msse2" } */
3 
/* { dg-require-effective-target sse2_runtime } */
4 
 
5 
extern void abort (void);
6 
typedef unsigned long long uint64_t;
7 
 
8 
#define vector(elcount, type)  \
9 
__attribute__((vector_size((elcount)*sizeof(type)))) type
10 
 
11 
#define FN(elcount, type, idx) \
12 
__attribute__((noinline, noclone)) \
13 
type f##type##elcount##_##idx (vector (elcount, type) x) { return x[idx] + 1; }
14 
#define T2(elcount, type) \
15 
  H (elcount, type) \
16 
  F (elcount, type, 0) \
17 
  F (elcount, type, 1)
18 
#define T4(elcount, type) \
19 
  T2 (elcount, type) \
20 
  F (elcount, type, 2) \
21 
  F (elcount, type, 3)
22 
#define T8(elcount, type) \
23 
  T4 (elcount, type) \
24 
  F (elcount, type, 4) \
25 
  F (elcount, type, 5) \
26 
  F (elcount, type, 6) \
27 
  F (elcount, type, 7)
28 
#define T16(elcount, type) \
29 
  T8 (elcount, type) \
30 
  F (elcount, type, 8) \
31 
  F (elcount, type, 9) \
32 
  F (elcount, type, 10) \
33 
  F (elcount, type, 11) \
34 
  F (elcount, type, 12) \
35 
  F (elcount, type, 13) \
36 
  F (elcount, type, 14) \
37 
  F (elcount, type, 15)
38 
#define T32(elcount, type) \
39 
  T16 (elcount, type) \
40 
  F (elcount, type, 16) \
41 
  F (elcount, type, 17) \
42 
  F (elcount, type, 18) \
43 
  F (elcount, type, 19) \
44 
  F (elcount, type, 20) \
45 
  F (elcount, type, 21) \
46 
  F (elcount, type, 22) \
47 
  F (elcount, type, 23) \
48 
  F (elcount, type, 24) \
49 
  F (elcount, type, 25) \
50 
  F (elcount, type, 26) \
51 
  F (elcount, type, 27) \
52 
  F (elcount, type, 28) \
53 
  F (elcount, type, 29) \
54 
  F (elcount, type, 30) \
55 
  F (elcount, type, 31)
56 
#define TESTS_SSE2 \
57 
T2 (2, double) E \
58 
T2 (2, uint64_t) E \
59 
T4 (4, float) E \
60 
T4 (4, int) E \
61 
T8 (8, short) E \
62 
T16 (16, char) E
63 
#define TESTS_AVX \
64 
T4 (4, double) E \
65 
T4 (4, uint64_t) E \
66 
T8 (8, float) E \
67 
T8 (8, int) E \
68 
T16 (16, short) E \
69 
T32 (32, char) E
70 
#ifdef __AVX__
71 
#define TESTS TESTS_SSE2 TESTS_AVX
72 
#else
73 
#define TESTS TESTS_SSE2
74 
#endif
75 
 
76 
#define F FN
77 
#define H(elcount, type)
78 
#define E
79 
TESTS
80 
 
81 
int
82 
main ()
83 
{
84 
#undef F
85 
#undef H
86 
#undef E
87 
#define H(elcount, type) \
88 
  vector (elcount, type) v##type##elcount = {
89 
#define E };
90 
#define F(elcount, type, idx) idx + 1,
91 
  TESTS
92 
#undef F
93 
#undef H
94 
#undef E
95 
#define H(elcount, type)
96 
#define E
97 
#define F(elcount, type, idx) \
98 
  if (f##type##elcount##_##idx (v##type##elcount) != idx + 2) \
99 
    abort ();
100 
  TESTS
101 
  return 0;
102 
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.