OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.target/] [microblaze/] [isa/] [fcvt.c] - Blame information for rev 801

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 691 jeremybenn
/* { dg-options "-O3 -mcpu=v6.00.a -mhard-float -mxl-float-convert" } */
2
 
3
int float_func (float f)
4
{
5
  /* { dg-final { scan-assembler "flt\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r(\[0-9]\|\[1-2]\[0-9]\|3\[0-1])\[^0-9]" } } */
6
   return f;
7
}
8
 
9
 
10
float int_func (int i)
11
{
12
  /* { dg-final { scan-assembler "fint\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r(\[0-9]\|\[1-2]\[0-9]\|3\[0-1])\[^0-9]" } } */
13
   return i;
14
}
15
 
16
 
17
float uint_func (unsigned int i)
18
{
19
  /* { dg-final { scan-assembler "fint\tr(\[0-9]\|\[1-2]\[0-9]\|3\[0-1]),r(\[0-9]\|\[1-2]\[0-9]\|3\[0-1])\[^0-9]" } } */
20
   return i;
21
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.