OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.target/] [mips/] [asm-1.c] - Blame information for rev 704

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 691 jeremybenn
/* PR target/17565.  GCC used to put the asm into the delay slot
2
   of the call.  */
3
/* { dg-do assemble } */
4
/* { dg-options "-O" } */
5
 
6
NOMIPS16 int foo (int n)
7
{
8
  register int k asm ("$16") = n;
9
  if (k > 0)
10
    {
11
      bar ();
12
      asm ("li %0,0x12345678" : "=r" (k));
13
    }
14
  return k;
15
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.