| 1 |
691 |
jeremybenn |
/* Test MIPS32 DSP instructions */
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| 2 |
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/* { dg-do compile } */
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| 3 |
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/* { dg-options "-mgp32 -mdsp" } */
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| 4 |
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/* { dg-final { scan-assembler "addq.ph" } } */
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| 5 |
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/* { dg-final { scan-assembler "addq_s.ph" } } */
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| 6 |
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/* { dg-final { scan-assembler "addq_s.w" } } */
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| 7 |
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/* { dg-final { scan-assembler "addu.qb" } } */
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| 8 |
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/* { dg-final { scan-assembler "addu_s.qb" } } */
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| 9 |
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/* { dg-final { scan-assembler "subq.ph" } } */
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| 10 |
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/* { dg-final { scan-assembler "subq_s.ph" } } */
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| 11 |
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/* { dg-final { scan-assembler "subq_s.w" } } */
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| 12 |
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/* { dg-final { scan-assembler "subu.qb" } } */
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| 13 |
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/* { dg-final { scan-assembler "subu_s.qb" } } */
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| 14 |
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/* { dg-final { scan-assembler "addsc" } } */
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| 15 |
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/* { dg-final { scan-assembler "addwc" } } */
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| 16 |
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/* { dg-final { scan-assembler "modsub" } } */
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| 17 |
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/* { dg-final { scan-assembler "raddu.w.qb" } } */
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| 18 |
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/* { dg-final { scan-assembler "absq_s.ph" } } */
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| 19 |
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/* { dg-final { scan-assembler "absq_s.w" } } */
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| 20 |
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/* { dg-final { scan-assembler "precrq.qb.ph" } } */
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| 21 |
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/* { dg-final { scan-assembler "precrq.ph.w" } } */
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| 22 |
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/* { dg-final { scan-assembler "precrq_rs.ph.w" } } */
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| 23 |
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/* { dg-final { scan-assembler "precrqu_s.qb.ph" } } */
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| 24 |
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/* { dg-final { scan-assembler "preceq.w.phl" } } */
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| 25 |
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/* { dg-final { scan-assembler "preceq.w.phr" } } */
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| 26 |
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/* { dg-final { scan-assembler "precequ.ph.qbl" } } */
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| 27 |
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/* { dg-final { scan-assembler "precequ.ph.qbr" } } */
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| 28 |
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/* { dg-final { scan-assembler "precequ.ph.qbla" } } */
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| 29 |
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/* { dg-final { scan-assembler "precequ.ph.qbra" } } */
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| 30 |
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/* { dg-final { scan-assembler "preceu.ph.qbl" } } */
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| 31 |
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/* { dg-final { scan-assembler "preceu.ph.qbr" } } */
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| 32 |
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/* { dg-final { scan-assembler "preceu.ph.qbla" } } */
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| 33 |
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/* { dg-final { scan-assembler "preceu.ph.qbra" } } */
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| 34 |
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/* { dg-final { scan-assembler "shllv?.qb" } } */
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| 35 |
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/* { dg-final { scan-assembler "shllv?.ph" } } */
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| 36 |
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/* { dg-final { scan-assembler "shllv?_s.ph" } } */
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| 37 |
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/* { dg-final { scan-assembler "shllv?_s.w" } } */
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| 38 |
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/* { dg-final { scan-assembler "shrlv?.qb" } } */
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| 39 |
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/* { dg-final { scan-assembler "shrav?.ph" } } */
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| 40 |
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/* { dg-final { scan-assembler "shrav?_r.ph" } } */
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| 41 |
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/* { dg-final { scan-assembler "shrav?_r.w" } } */
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| 42 |
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/* { dg-final { scan-assembler "muleu_s.ph.qbl" } } */
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| 43 |
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/* { dg-final { scan-assembler "muleu_s.ph.qbr" } } */
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| 44 |
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/* { dg-final { scan-assembler "mulq_rs.ph" } } */
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| 45 |
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/* { dg-final { scan-assembler "muleq_s.w.phl" } } */
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| 46 |
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/* { dg-final { scan-assembler "muleq_s.w.phr" } } */
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| 47 |
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/* { dg-final { scan-assembler "dpau.h.qbl" } } */
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| 48 |
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/* { dg-final { scan-assembler "dpau.h.qbr" } } */
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| 49 |
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/* { dg-final { scan-assembler "dpsu.h.qbl" } } */
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| 50 |
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/* { dg-final { scan-assembler "dpsu.h.qbr" } } */
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| 51 |
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/* { dg-final { scan-assembler "dpaq_s.w.ph" } } */
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| 52 |
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/* { dg-final { scan-assembler "dpsq_s.w.ph" } } */
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| 53 |
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/* { dg-final { scan-assembler "mulsaq_s.w.ph" } } */
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| 54 |
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/* { dg-final { scan-assembler "dpaq_sa.l.w" } } */
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| 55 |
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/* { dg-final { scan-assembler "dpsq_sa.l.w" } } */
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| 56 |
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/* { dg-final { scan-assembler "maq_s.w.phl" } } */
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| 57 |
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/* { dg-final { scan-assembler "maq_s.w.phr" } } */
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| 58 |
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/* { dg-final { scan-assembler "maq_sa.w.phl" } } */
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| 59 |
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/* { dg-final { scan-assembler "maq_sa.w.phr" } } */
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| 60 |
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/* { dg-final { scan-assembler "bitrev" } } */
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| 61 |
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/* { dg-final { scan-assembler "insv" } } */
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| 62 |
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/* { dg-final { scan-assembler "replv?.qb" } } */
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| 63 |
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/* { dg-final { scan-assembler "repl.ph" } } */
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| 64 |
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/* { dg-final { scan-assembler "replv.ph" } } */
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| 65 |
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/* { dg-final { scan-assembler "cmpu.eq.qb" } } */
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| 66 |
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/* { dg-final { scan-assembler "cmpu.lt.qb" } } */
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| 67 |
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/* { dg-final { scan-assembler "cmpu.le.qb" } } */
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| 68 |
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/* { dg-final { scan-assembler "cmpgu.eq.qb" } } */
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| 69 |
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/* { dg-final { scan-assembler "cmpgu.lt.qb" } } */
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| 70 |
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/* { dg-final { scan-assembler "cmpgu.le.qb" } } */
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| 71 |
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/* { dg-final { scan-assembler "cmp.eq.ph" } } */
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| 72 |
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/* { dg-final { scan-assembler "cmp.lt.ph" } } */
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| 73 |
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/* { dg-final { scan-assembler "cmp.le.ph" } } */
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| 74 |
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/* { dg-final { scan-assembler "pick.qb" } } */
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| 75 |
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/* { dg-final { scan-assembler "pick.ph" } } */
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| 76 |
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/* { dg-final { scan-assembler "packrl.ph" } } */
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| 77 |
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/* { dg-final { scan-assembler "extrv?.w" } } */
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| 78 |
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/* { dg-final { scan-assembler "extrv?_s.h" } } */
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| 79 |
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/* { dg-final { scan-assembler "extrv?_r.w" } } */
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| 80 |
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/* { dg-final { scan-assembler "extrv?_rs.w" } } */
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| 81 |
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/* { dg-final { scan-assembler "extpv?" } } */
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| 82 |
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/* { dg-final { scan-assembler "extpdpv?" } } */
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| 83 |
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/* { dg-final { scan-assembler "shilov?" } } */
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| 84 |
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/* { dg-final { scan-assembler "mthlip" } } */
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| 85 |
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/* { dg-final { scan-assembler "mfhi" } } */
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| 86 |
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/* { dg-final { scan-assembler "mflo" } } */
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| 87 |
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/* { dg-final { scan-assembler "mthi" } } */
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| 88 |
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/* { dg-final { scan-assembler "mtlo" } } */
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| 89 |
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/* { dg-final { scan-assembler "wrdsp" } } */
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| 90 |
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/* { dg-final { scan-assembler "rddsp" } } */
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| 91 |
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/* { dg-final { scan-assembler "lbux?" } } */
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| 92 |
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/* { dg-final { scan-assembler "lhx?" } } */
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| 93 |
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/* { dg-final { scan-assembler "lwx?" } } */
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| 94 |
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/* { dg-final { scan-assembler "bposge32" } } */
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| 95 |
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/* { dg-final { scan-assembler "madd" } } */
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| 96 |
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/* { dg-final { scan-assembler "maddu" } } */
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| 97 |
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/* { dg-final { scan-assembler "msub" } } */
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| 98 |
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/* { dg-final { scan-assembler "msubu" } } */
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| 99 |
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/* { dg-final { scan-assembler "mult" } } */
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| 100 |
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/* { dg-final { scan-assembler "multu" } } */
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| 101 |
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| 102 |
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#include <stdlib.h>
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| 103 |
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#include <stdio.h>
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| 104 |
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| 105 |
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typedef signed char v4i8 __attribute__ ((vector_size(4)));
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| 106 |
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typedef short v2q15 __attribute__ ((vector_size(4)));
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| 107 |
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| 108 |
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typedef int q31;
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| 109 |
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typedef int i32;
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| 110 |
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typedef unsigned int ui32;
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| 111 |
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typedef long long a64;
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| 112 |
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| 113 |
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NOMIPS16 void test_MIPS_DSP (void);
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| 114 |
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| 115 |
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char array[100];
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| 116 |
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int little_endian;
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| 117 |
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| 118 |
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int main ()
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| 119 |
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{
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| 120 |
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int i;
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| 121 |
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| 122 |
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union { long long ll; int i[2]; } endianness_test;
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| 123 |
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endianness_test.ll = 1;
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little_endian = endianness_test.i[0];
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| 125 |
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| 126 |
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for (i = 0; i < 100; i++)
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array[i] = i;
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| 128 |
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| 129 |
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test_MIPS_DSP ();
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| 130 |
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| 131 |
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exit (0);
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| 132 |
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}
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| 133 |
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| 134 |
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NOMIPS16 v2q15 add_v2q15 (v2q15 a, v2q15 b)
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| 135 |
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{
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| 136 |
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return __builtin_mips_addq_ph (a, b);
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| 137 |
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}
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| 138 |
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| 139 |
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NOMIPS16 v4i8 add_v4i8 (v4i8 a, v4i8 b)
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| 140 |
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{
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| 141 |
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return __builtin_mips_addu_qb (a, b);
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| 142 |
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}
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| 143 |
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| 144 |
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NOMIPS16 v2q15 sub_v2q15 (v2q15 a, v2q15 b)
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| 145 |
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{
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| 146 |
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return __builtin_mips_subq_ph (a, b);
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| 147 |
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}
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| 148 |
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| 149 |
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NOMIPS16 v4i8 sub_v4i8 (v4i8 a, v4i8 b)
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| 150 |
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{
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| 151 |
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return __builtin_mips_subu_qb (a, b);
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| 152 |
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}
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| 153 |
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| 154 |
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NOMIPS16 void test_MIPS_DSP ()
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| 155 |
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{
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| 156 |
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v4i8 v4i8_a,v4i8_b,v4i8_c,v4i8_r,v4i8_s;
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| 157 |
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v2q15 v2q15_a,v2q15_b,v2q15_c,v2q15_r,v2q15_s;
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| 158 |
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q31 q31_a,q31_b,q31_c,q31_r,q31_s;
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| 159 |
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i32 i32_a,i32_b,i32_c,i32_r,i32_s;
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| 160 |
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ui32 ui32_a,ui32_b,ui32_c;
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| 161 |
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a64 a64_a,a64_b,a64_c,a64_r,a64_s;
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| 162 |
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| 163 |
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void *ptr_a;
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| 164 |
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int r,s;
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| 165 |
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long long lr,ls;
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| 166 |
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| 167 |
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v2q15_a = (v2q15) {0x1234, 0x5678};
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| 168 |
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v2q15_b = (v2q15) {0x6f89, 0x1111};
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| 169 |
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v2q15_s = (v2q15) {0x81bd, 0x6789};
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| 170 |
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v2q15_r = add_v2q15 (v2q15_a, v2q15_b);
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| 171 |
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r = (int) v2q15_r;
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| 172 |
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s = (int) v2q15_s;
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| 173 |
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if (r != s)
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| 174 |
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abort ();
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| 175 |
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| 176 |
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v2q15_a = (v2q15) {0x1234, 0x5678};
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| 177 |
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v2q15_b = (v2q15) {0x6f89, 0x1111};
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| 178 |
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v2q15_s = (v2q15) {0x7fff, 0x6789};
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| 179 |
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v2q15_r = __builtin_mips_addq_s_ph (v2q15_a, v2q15_b);
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| 180 |
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r = (int) v2q15_r;
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| 181 |
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s = (int) v2q15_s;
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| 182 |
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if (r != s)
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| 183 |
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abort ();
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| 184 |
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| 185 |
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q31_a = 0x70000000;
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| 186 |
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q31_b = 0x71234567;
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| 187 |
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q31_s = 0x7fffffff;
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| 188 |
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q31_r = __builtin_mips_addq_s_w (q31_a, q31_b);
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| 189 |
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if (q31_r != q31_s)
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| 190 |
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abort ();
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| 191 |
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| 192 |
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v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
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| 193 |
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v4i8_b = (v4i8) {0xff, 0x89, 0x11, 0x11};
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| 194 |
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v4i8_s = (v4i8) {0xf1, 0xbd, 0x67, 0x89};
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| 195 |
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v4i8_r = add_v4i8 (v4i8_a, v4i8_b);
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| 196 |
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r = (int) v4i8_r;
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| 197 |
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s = (int) v4i8_s;
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| 198 |
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if (r != s)
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| 199 |
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abort ();
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| 200 |
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|
| 201 |
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v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
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| 202 |
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v4i8_b = (v4i8) {0xff, 0x89, 0x11, 0x11};
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| 203 |
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v4i8_s = (v4i8) {0xff, 0xbd, 0x67, 0x89};
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| 204 |
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v4i8_r = __builtin_mips_addu_s_qb (v4i8_a, v4i8_b);
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| 205 |
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r = (int) v4i8_r;
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| 206 |
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s = (int) v4i8_s;
|
| 207 |
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if (r != s)
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| 208 |
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abort ();
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| 209 |
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|
| 210 |
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v2q15_a = (v2q15) {0x1234, 0x5678};
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| 211 |
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v2q15_b = (v2q15) {0x6f89, 0x1111};
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| 212 |
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v2q15_s = (v2q15) {0xa2ab, 0x4567};
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| 213 |
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v2q15_r = sub_v2q15 (v2q15_a, v2q15_b);
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| 214 |
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r = (int) v2q15_r;
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| 215 |
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s = (int) v2q15_s;
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| 216 |
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if (r != s)
|
| 217 |
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abort ();
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| 218 |
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|
| 219 |
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v2q15_a = (v2q15) {0x8000, 0x5678};
|
| 220 |
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v2q15_b = (v2q15) {0x6f89, 0x1111};
|
| 221 |
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v2q15_s = (v2q15) {0x8000, 0x4567};
|
| 222 |
|
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v2q15_r = __builtin_mips_subq_s_ph (v2q15_a, v2q15_b);
|
| 223 |
|
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r = (int) v2q15_r;
|
| 224 |
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s = (int) v2q15_s;
|
| 225 |
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if (r != s)
|
| 226 |
|
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abort ();
|
| 227 |
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|
|
| 228 |
|
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q31_a = 0x70000000;
|
| 229 |
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q31_b = 0x71234567;
|
| 230 |
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q31_s = 0xfedcba99;
|
| 231 |
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q31_r = __builtin_mips_subq_s_w (q31_a, q31_b);
|
| 232 |
|
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if (q31_r != q31_s)
|
| 233 |
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abort ();
|
| 234 |
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|
| 235 |
|
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v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
|
| 236 |
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v4i8_b = (v4i8) {0xff, 0x89, 0x11, 0x11};
|
| 237 |
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v4i8_s = (v4i8) {0xf3, 0xab, 0x45, 0x67};
|
| 238 |
|
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v4i8_r = sub_v4i8 (v4i8_a, v4i8_b);
|
| 239 |
|
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r = (int) v4i8_r;
|
| 240 |
|
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s = (int) v4i8_s;
|
| 241 |
|
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if (r != s)
|
| 242 |
|
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abort ();
|
| 243 |
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|
| 244 |
|
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v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
|
| 245 |
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v4i8_b = (v4i8) {0xff, 0x89, 0x11, 0x11};
|
| 246 |
|
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v4i8_s = (v4i8) {0x0, 0x0, 0x45, 0x67};
|
| 247 |
|
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v4i8_r = __builtin_mips_subu_s_qb (v4i8_a, v4i8_b);
|
| 248 |
|
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r = (int) v4i8_r;
|
| 249 |
|
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s = (int) v4i8_s;
|
| 250 |
|
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if (r != s)
|
| 251 |
|
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abort ();
|
| 252 |
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|
| 253 |
|
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i32_a = 0xf5678900;
|
| 254 |
|
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i32_b = 0x7abcdef0;
|
| 255 |
|
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i32_s = 0x702467f0;
|
| 256 |
|
|
i32_r = __builtin_mips_addsc (i32_a, i32_b);
|
| 257 |
|
|
if (i32_r != i32_s)
|
| 258 |
|
|
abort ();
|
| 259 |
|
|
|
| 260 |
|
|
i32_a = 0x75678900;
|
| 261 |
|
|
i32_b = 0x7abcdef0;
|
| 262 |
|
|
i32_s = 0xf02467f1;
|
| 263 |
|
|
i32_r = __builtin_mips_addwc (i32_a, i32_b);
|
| 264 |
|
|
if (i32_r != i32_s)
|
| 265 |
|
|
abort ();
|
| 266 |
|
|
|
| 267 |
|
|
i32_a = 0;
|
| 268 |
|
|
i32_b = 0x00000901;
|
| 269 |
|
|
i32_s = 9;
|
| 270 |
|
|
i32_r = __builtin_mips_modsub (i32_a, i32_b);
|
| 271 |
|
|
if (i32_r != i32_s)
|
| 272 |
|
|
abort ();
|
| 273 |
|
|
|
| 274 |
|
|
v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
|
| 275 |
|
|
i32_s = 0x1f4;
|
| 276 |
|
|
i32_r = __builtin_mips_raddu_w_qb (v4i8_a);
|
| 277 |
|
|
if (i32_r != i32_s)
|
| 278 |
|
|
abort ();
|
| 279 |
|
|
|
| 280 |
|
|
v2q15_a = (v2q15) {0x8000, 0x8134};
|
| 281 |
|
|
v2q15_s = (v2q15) {0x7fff, 0x7ecc};
|
| 282 |
|
|
v2q15_r = __builtin_mips_absq_s_ph (v2q15_a);
|
| 283 |
|
|
r = (int) v2q15_r;
|
| 284 |
|
|
s = (int) v2q15_s;
|
| 285 |
|
|
if (r != s)
|
| 286 |
|
|
abort ();
|
| 287 |
|
|
|
| 288 |
|
|
q31_a = (q31) 0x80000000;
|
| 289 |
|
|
q31_s = (q31) 0x7fffffff;
|
| 290 |
|
|
q31_r = __builtin_mips_absq_s_w (q31_a);
|
| 291 |
|
|
if (q31_r != q31_s)
|
| 292 |
|
|
abort ();
|
| 293 |
|
|
|
| 294 |
|
|
v2q15_a = (v2q15) {0x9999, 0x5612};
|
| 295 |
|
|
v2q15_b = (v2q15) {0x5612, 0x3333};
|
| 296 |
|
|
if (little_endian)
|
| 297 |
|
|
v4i8_s = (v4i8) {0x56, 0x33, 0x99, 0x56};
|
| 298 |
|
|
else
|
| 299 |
|
|
v4i8_s = (v4i8) {0x99, 0x56, 0x56, 0x33};
|
| 300 |
|
|
v4i8_r = __builtin_mips_precrq_qb_ph (v2q15_a, v2q15_b);
|
| 301 |
|
|
r = (int) v4i8_r;
|
| 302 |
|
|
s = (int) v4i8_s;
|
| 303 |
|
|
if (r != s)
|
| 304 |
|
|
abort ();
|
| 305 |
|
|
|
| 306 |
|
|
q31_a = 0x12348678;
|
| 307 |
|
|
q31_b = 0x44445555;
|
| 308 |
|
|
if (little_endian)
|
| 309 |
|
|
v2q15_s = (v2q15) {0x4444, 0x1234};
|
| 310 |
|
|
else
|
| 311 |
|
|
v2q15_s = (v2q15) {0x1234, 0x4444};
|
| 312 |
|
|
v2q15_r = __builtin_mips_precrq_ph_w (q31_a, q31_b);
|
| 313 |
|
|
r = (int) v2q15_r;
|
| 314 |
|
|
s = (int) v2q15_s;
|
| 315 |
|
|
if (r != s)
|
| 316 |
|
|
abort ();
|
| 317 |
|
|
|
| 318 |
|
|
q31_a = 0x12348678;
|
| 319 |
|
|
q31_b = 0x44445555;
|
| 320 |
|
|
if (little_endian)
|
| 321 |
|
|
v2q15_s = (v2q15) {0x4444, 0x1235};
|
| 322 |
|
|
else
|
| 323 |
|
|
v2q15_s = (v2q15) {0x1235, 0x4444};
|
| 324 |
|
|
v2q15_r = __builtin_mips_precrq_rs_ph_w (q31_a, q31_b);
|
| 325 |
|
|
r = (int) v2q15_r;
|
| 326 |
|
|
s = (int) v2q15_s;
|
| 327 |
|
|
if (r != s)
|
| 328 |
|
|
abort ();
|
| 329 |
|
|
|
| 330 |
|
|
v2q15_a = (v2q15) {0x9999, 0x5612};
|
| 331 |
|
|
v2q15_b = (v2q15) {0x5612, 0x3333};
|
| 332 |
|
|
if (little_endian)
|
| 333 |
|
|
v4i8_s = (v4i8) {0xac, 0x66, 0x00, 0xac};
|
| 334 |
|
|
else
|
| 335 |
|
|
v4i8_s = (v4i8) {0x00, 0xac, 0xac, 0x66};
|
| 336 |
|
|
v4i8_r = __builtin_mips_precrqu_s_qb_ph (v2q15_a, v2q15_b);
|
| 337 |
|
|
r = (int) v4i8_r;
|
| 338 |
|
|
s = (int) v4i8_s;
|
| 339 |
|
|
if (r != s)
|
| 340 |
|
|
abort ();
|
| 341 |
|
|
|
| 342 |
|
|
v2q15_a = (v2q15) {0x3589, 0x4444};
|
| 343 |
|
|
if (little_endian)
|
| 344 |
|
|
q31_s = 0x44440000;
|
| 345 |
|
|
else
|
| 346 |
|
|
q31_s = 0x35890000;
|
| 347 |
|
|
q31_r = __builtin_mips_preceq_w_phl (v2q15_a);
|
| 348 |
|
|
if (q31_r != q31_s)
|
| 349 |
|
|
abort ();
|
| 350 |
|
|
|
| 351 |
|
|
v2q15_a = (v2q15) {0x3589, 0x4444};
|
| 352 |
|
|
if (little_endian)
|
| 353 |
|
|
q31_s = 0x35890000;
|
| 354 |
|
|
else
|
| 355 |
|
|
q31_s = 0x44440000;
|
| 356 |
|
|
q31_r = __builtin_mips_preceq_w_phr (v2q15_a);
|
| 357 |
|
|
if (q31_r != q31_s)
|
| 358 |
|
|
abort ();
|
| 359 |
|
|
|
| 360 |
|
|
v4i8_a = (v4i8) {0x12, 0x56, 0x56, 0x33};
|
| 361 |
|
|
if (little_endian)
|
| 362 |
|
|
v2q15_s = (v2q15) {0x2b00, 0x1980};
|
| 363 |
|
|
else
|
| 364 |
|
|
v2q15_s = (v2q15) {0x0900, 0x2b00};
|
| 365 |
|
|
v2q15_r = __builtin_mips_precequ_ph_qbl (v4i8_a);
|
| 366 |
|
|
r = (int) v2q15_r;
|
| 367 |
|
|
s = (int) v2q15_s;
|
| 368 |
|
|
if (r != s)
|
| 369 |
|
|
abort ();
|
| 370 |
|
|
|
| 371 |
|
|
v4i8_a = (v4i8) {0x12, 0x56, 0x56, 0x33};
|
| 372 |
|
|
if (little_endian)
|
| 373 |
|
|
v2q15_s = (v2q15) {0x0900, 0x2b00};
|
| 374 |
|
|
else
|
| 375 |
|
|
v2q15_s = (v2q15) {0x2b00, 0x1980};
|
| 376 |
|
|
v2q15_r = __builtin_mips_precequ_ph_qbr (v4i8_a);
|
| 377 |
|
|
r = (int) v2q15_r;
|
| 378 |
|
|
s = (int) v2q15_s;
|
| 379 |
|
|
if (r != s)
|
| 380 |
|
|
abort ();
|
| 381 |
|
|
|
| 382 |
|
|
v4i8_a = (v4i8) {0x12, 0x56, 0x56, 0x33};
|
| 383 |
|
|
if (little_endian)
|
| 384 |
|
|
v2q15_s = (v2q15) {0x2b00, 0x1980};
|
| 385 |
|
|
else
|
| 386 |
|
|
v2q15_s = (v2q15) {0x0900, 0x2b00};
|
| 387 |
|
|
v2q15_r = __builtin_mips_precequ_ph_qbla (v4i8_a);
|
| 388 |
|
|
r = (int) v2q15_r;
|
| 389 |
|
|
s = (int) v2q15_s;
|
| 390 |
|
|
if (r != s)
|
| 391 |
|
|
abort ();
|
| 392 |
|
|
|
| 393 |
|
|
v4i8_a = (v4i8) {0x12, 0x56, 0x56, 0x33};
|
| 394 |
|
|
if (little_endian)
|
| 395 |
|
|
v2q15_s = (v2q15) {0x0900, 0x2b00};
|
| 396 |
|
|
else
|
| 397 |
|
|
v2q15_s = (v2q15) {0x2b00, 0x1980};
|
| 398 |
|
|
v2q15_r = __builtin_mips_precequ_ph_qbra (v4i8_a);
|
| 399 |
|
|
r = (int) v2q15_r;
|
| 400 |
|
|
s = (int) v2q15_s;
|
| 401 |
|
|
if (r != s)
|
| 402 |
|
|
abort ();
|
| 403 |
|
|
|
| 404 |
|
|
v4i8_a = (v4i8) {0x12, 0x56, 0x56, 0x33};
|
| 405 |
|
|
if (little_endian)
|
| 406 |
|
|
v2q15_s = (v2q15) {0x56, 0x33};
|
| 407 |
|
|
else
|
| 408 |
|
|
v2q15_s = (v2q15) {0x12, 0x56};
|
| 409 |
|
|
v2q15_r = __builtin_mips_preceu_ph_qbl (v4i8_a);
|
| 410 |
|
|
r = (int) v2q15_r;
|
| 411 |
|
|
s = (int) v2q15_s;
|
| 412 |
|
|
if (r != s)
|
| 413 |
|
|
abort ();
|
| 414 |
|
|
|
| 415 |
|
|
v4i8_a = (v4i8) {0x12, 0x56, 0x56, 0x33};
|
| 416 |
|
|
if (little_endian)
|
| 417 |
|
|
v2q15_s = (v2q15) {0x12, 0x56};
|
| 418 |
|
|
else
|
| 419 |
|
|
v2q15_s = (v2q15) {0x56, 0x33};
|
| 420 |
|
|
v2q15_r = __builtin_mips_preceu_ph_qbr (v4i8_a);
|
| 421 |
|
|
r = (int) v2q15_r;
|
| 422 |
|
|
s = (int) v2q15_s;
|
| 423 |
|
|
if (r != s)
|
| 424 |
|
|
abort ();
|
| 425 |
|
|
|
| 426 |
|
|
v4i8_a = (v4i8) {0x12, 0x99, 0x56, 0x33};
|
| 427 |
|
|
if (little_endian)
|
| 428 |
|
|
v2q15_s = (v2q15) {0x99, 0x33};
|
| 429 |
|
|
else
|
| 430 |
|
|
v2q15_s = (v2q15) {0x12, 0x56};
|
| 431 |
|
|
v2q15_r = __builtin_mips_preceu_ph_qbla (v4i8_a);
|
| 432 |
|
|
r = (int) v2q15_r;
|
| 433 |
|
|
s = (int) v2q15_s;
|
| 434 |
|
|
if (r != s)
|
| 435 |
|
|
abort ();
|
| 436 |
|
|
|
| 437 |
|
|
v4i8_a = (v4i8) {0x12, 0x99, 0x56, 0x33};
|
| 438 |
|
|
if (little_endian)
|
| 439 |
|
|
v2q15_s = (v2q15) {0x12, 0x56};
|
| 440 |
|
|
else
|
| 441 |
|
|
v2q15_s = (v2q15) {0x99, 0x33};
|
| 442 |
|
|
v2q15_r = __builtin_mips_preceu_ph_qbra (v4i8_a);
|
| 443 |
|
|
r = (int) v2q15_r;
|
| 444 |
|
|
s = (int) v2q15_s;
|
| 445 |
|
|
if (r != s)
|
| 446 |
|
|
abort ();
|
| 447 |
|
|
|
| 448 |
|
|
v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
|
| 449 |
|
|
v4i8_s = (v4i8) {0xc8, 0xd0, 0x58, 0xe0};
|
| 450 |
|
|
v4i8_r = __builtin_mips_shll_qb (v4i8_a, 2);
|
| 451 |
|
|
r = (int) v4i8_r;
|
| 452 |
|
|
s = (int) v4i8_s;
|
| 453 |
|
|
if (r != s)
|
| 454 |
|
|
abort ();
|
| 455 |
|
|
|
| 456 |
|
|
v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
|
| 457 |
|
|
i32_b = 1;
|
| 458 |
|
|
v4i8_s = (v4i8) {0xe4, 0x68, 0xac, 0xf0};
|
| 459 |
|
|
v4i8_r = __builtin_mips_shll_qb (v4i8_a, i32_b);
|
| 460 |
|
|
r = (int) v4i8_r;
|
| 461 |
|
|
s = (int) v4i8_s;
|
| 462 |
|
|
if (r != s)
|
| 463 |
|
|
abort ();
|
| 464 |
|
|
|
| 465 |
|
|
v2q15_a = (v2q15) {0x1234, 0x5678};
|
| 466 |
|
|
v2q15_s = (v2q15) {0x48d0, 0x59e0};
|
| 467 |
|
|
v2q15_r = __builtin_mips_shll_ph (v2q15_a, 2);
|
| 468 |
|
|
r = (int) v2q15_r;
|
| 469 |
|
|
s = (int) v2q15_s;
|
| 470 |
|
|
if (r != s)
|
| 471 |
|
|
abort ();
|
| 472 |
|
|
|
| 473 |
|
|
v2q15_a = (v2q15) {0x1234, 0x5678};
|
| 474 |
|
|
i32_b = 1;
|
| 475 |
|
|
v2q15_s = (v2q15) {0x2468, 0xacf0};
|
| 476 |
|
|
v2q15_r = __builtin_mips_shll_ph (v2q15_a, i32_b);
|
| 477 |
|
|
r = (int) v2q15_r;
|
| 478 |
|
|
s = (int) v2q15_s;
|
| 479 |
|
|
if (r != s)
|
| 480 |
|
|
abort ();
|
| 481 |
|
|
|
| 482 |
|
|
v2q15_a = (v2q15) {0x1234, 0x5678};
|
| 483 |
|
|
v2q15_s = (v2q15) {0x48d0, 0x7fff};
|
| 484 |
|
|
v2q15_r = __builtin_mips_shll_s_ph (v2q15_a, 2);
|
| 485 |
|
|
r = (int) v2q15_r;
|
| 486 |
|
|
s = (int) v2q15_s;
|
| 487 |
|
|
if (r != s)
|
| 488 |
|
|
abort ();
|
| 489 |
|
|
|
| 490 |
|
|
v2q15_a = (v2q15) {0x1234, 0x5678};
|
| 491 |
|
|
i32_b = 1;
|
| 492 |
|
|
v2q15_s = (v2q15) {0x2468, 0x7fff};
|
| 493 |
|
|
v2q15_r = __builtin_mips_shll_s_ph (v2q15_a, i32_b);
|
| 494 |
|
|
r = (int) v2q15_r;
|
| 495 |
|
|
s = (int) v2q15_s;
|
| 496 |
|
|
if (r != s)
|
| 497 |
|
|
abort ();
|
| 498 |
|
|
|
| 499 |
|
|
q31_a = 0x70000000;
|
| 500 |
|
|
q31_s = 0x7fffffff;
|
| 501 |
|
|
q31_r = __builtin_mips_shll_s_w (q31_a, 2);
|
| 502 |
|
|
if (q31_r != q31_s)
|
| 503 |
|
|
abort ();
|
| 504 |
|
|
|
| 505 |
|
|
q31_a = 0x70000000;
|
| 506 |
|
|
i32_b = 1;
|
| 507 |
|
|
q31_s = 0x7fffffff;
|
| 508 |
|
|
q31_r = __builtin_mips_shll_s_w (q31_a, i32_b);
|
| 509 |
|
|
if (q31_r != q31_s)
|
| 510 |
|
|
abort ();
|
| 511 |
|
|
|
| 512 |
|
|
v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
|
| 513 |
|
|
v4i8_s = (v4i8) {0x3c, 0xd, 0x15, 0x1e};
|
| 514 |
|
|
v4i8_r = __builtin_mips_shrl_qb (v4i8_a, 2);
|
| 515 |
|
|
r = (int) v4i8_r;
|
| 516 |
|
|
s = (int) v4i8_s;
|
| 517 |
|
|
if (r != s)
|
| 518 |
|
|
abort ();
|
| 519 |
|
|
|
| 520 |
|
|
v4i8_a = (v4i8) {0xf2, 0x34, 0x56, 0x78};
|
| 521 |
|
|
i32_b = 1;
|
| 522 |
|
|
v4i8_s = (v4i8) {0x79, 0x1a, 0x2b, 0x3c};
|
| 523 |
|
|
v4i8_r = __builtin_mips_shrl_qb (v4i8_a, i32_b);
|
| 524 |
|
|
r = (int) v4i8_r;
|
| 525 |
|
|
s = (int) v4i8_s;
|
| 526 |
|
|
if (r != s)
|
| 527 |
|
|
abort ();
|
| 528 |
|
|
|
| 529 |
|
|
v2q15_a = (v2q15) {0x1234, 0x5678};
|
| 530 |
|
|
v2q15_s = (v2q15) {0x48d, 0x159e};
|
| 531 |
|
|
v2q15_r = __builtin_mips_shra_ph (v2q15_a, 2);
|
| 532 |
|
|
r = (int) v2q15_r;
|
| 533 |
|
|
s = (int) v2q15_s;
|
| 534 |
|
|
if (r != s)
|
| 535 |
|
|
abort ();
|
| 536 |
|
|
|
| 537 |
|
|
v2q15_a = (v2q15) {0x1234, 0x5678};
|
| 538 |
|
|
i32_b = 1;
|
| 539 |
|
|
v2q15_s = (v2q15) {0x91a, 0x2b3c};
|
| 540 |
|
|
v2q15_r = __builtin_mips_shra_ph (v2q15_a, i32_b);
|
| 541 |
|
|
r = (int) v2q15_r;
|
| 542 |
|
|
s = (int) v2q15_s;
|
| 543 |
|
|
if (r != s)
|
| 544 |
|
|
abort ();
|
| 545 |
|
|
|
| 546 |
|
|
v2q15_a = (v2q15) {0x1234, 0x5678};
|
| 547 |
|
|
v2q15_s = (v2q15) {0x48d, 0x159e};
|
| 548 |
|
|
v2q15_r = __builtin_mips_shra_r_ph (v2q15_a, 2);
|
| 549 |
|
|
r = (int) v2q15_r;
|
| 550 |
|
|
s = (int) v2q15_s;
|
| 551 |
|
|
if (r != s)
|
| 552 |
|
|
abort ();
|
| 553 |
|
|
|
| 554 |
|
|
v2q15_a = (v2q15) {0x1234, 0x5678};
|
| 555 |
|
|
i32_b = 3;
|
| 556 |
|
|
v2q15_s = (v2q15) {0x247, 0xacf};
|
| 557 |
|
|
v2q15_r = __builtin_mips_shra_r_ph (v2q15_a, i32_b);
|
| 558 |
|
|
r = (int) v2q15_r;
|
| 559 |
|
|
s = (int) v2q15_s;
|
| 560 |
|
|
if (r != s)
|
| 561 |
|
|
abort ();
|
| 562 |
|
|
|
| 563 |
|
|
q31_a = 0x70000000;
|
| 564 |
|
|
q31_s = 0x1c000000;
|
| 565 |
|
|
q31_r = __builtin_mips_shra_r_w (q31_a, 2);
|
| 566 |
|
|
if (q31_r != q31_s)
|
| 567 |
|
|
abort ();
|
| 568 |
|
|
|
| 569 |
|
|
q31_a = 0x70000004;
|
| 570 |
|
|
i32_b = 3;
|
| 571 |
|
|
q31_s = 0x0e000001;
|
| 572 |
|
|
q31_r = __builtin_mips_shra_r_w (q31_a, i32_b);
|
| 573 |
|
|
if (q31_r != q31_s)
|
| 574 |
|
|
abort ();
|
| 575 |
|
|
|
| 576 |
|
|
v4i8_a = (v4i8) {0x1, 0x2, 0x3, 0x4};
|
| 577 |
|
|
v2q15_b = (v2q15) {0x6f89, 0x1111};
|
| 578 |
|
|
if (little_endian)
|
| 579 |
|
|
v2q15_s = (v2q15) {0xffff, 0x4444};
|
| 580 |
|
|
else
|
| 581 |
|
|
v2q15_s = (v2q15) {0x6f89, 0x2222};
|
| 582 |
|
|
v2q15_r = __builtin_mips_muleu_s_ph_qbl (v4i8_a, v2q15_b);
|
| 583 |
|
|
r = (int) v2q15_r;
|
| 584 |
|
|
s = (int) v2q15_s;
|
| 585 |
|
|
if (r != s)
|
| 586 |
|
|
abort ();
|
| 587 |
|
|
|
| 588 |
|
|
v4i8_a = (v4i8) {0x1, 0x2, 0x3, 0x4};
|
| 589 |
|
|
v2q15_b = (v2q15) {0x6f89, 0x1111};
|
| 590 |
|
|
if (little_endian)
|
| 591 |
|
|
v2q15_s = (v2q15) {0x6f89, 0x2222};
|
| 592 |
|
|
else
|
| 593 |
|
|
v2q15_s = (v2q15) {0xffff, 0x4444};
|
| 594 |
|
|
v2q15_r = __builtin_mips_muleu_s_ph_qbr (v4i8_a, v2q15_b);
|
| 595 |
|
|
r = (int) v2q15_r;
|
| 596 |
|
|
s = (int) v2q15_s;
|
| 597 |
|
|
if (r != s)
|
| 598 |
|
|
abort ();
|
| 599 |
|
|
|
| 600 |
|
|
v2q15_a = (v2q15) {0x1234, 0x5678};
|
| 601 |
|
|
v2q15_b = (v2q15) {0x6f89, 0x1111};
|
| 602 |
|
|
v2q15_s = (v2q15) {0x0fdd, 0x0b87};
|
| 603 |
|
|
v2q15_r = __builtin_mips_mulq_rs_ph (v2q15_a, v2q15_b);
|
| 604 |
|
|
r = (int) v2q15_r;
|
| 605 |
|
|
s = (int) v2q15_s;
|
| 606 |
|
|
if (r != s)
|
| 607 |
|
|
abort ();
|
| 608 |
|
|
|
| 609 |
|
|
v2q15_a = (v2q15) {0x8000, 0x8000};
|
| 610 |
|
|
v2q15_b = (v2q15) {0x8000, 0x8000};
|
| 611 |
|
|
q31_s = 0x7fffffff;
|
| 612 |
|
|
q31_r = __builtin_mips_muleq_s_w_phl (v2q15_a, v2q15_b);
|
| 613 |
|
|
if (q31_r != q31_s)
|
| 614 |
|
|
abort ();
|
| 615 |
|
|
|
| 616 |
|
|
v2q15_a = (v2q15) {0x8000, 0x8000};
|
| 617 |
|
|
v2q15_b = (v2q15) {0x8000, 0x8000};
|
| 618 |
|
|
q31_s = 0x7fffffff;
|
| 619 |
|
|
q31_r = __builtin_mips_muleq_s_w_phr (v2q15_a, v2q15_b);
|
| 620 |
|
|
if (q31_r != q31_s)
|
| 621 |
|
|
abort ();
|
| 622 |
|
|
|
| 623 |
|
|
#ifndef __mips64
|
| 624 |
|
|
a64_a = 0x22221111;
|
| 625 |
|
|
v4i8_b = (v4i8) {0x12, 0x34, 0x56, 0x78};
|
| 626 |
|
|
v4i8_c = (v4i8) {0xaa, 0x89, 0x11, 0x34};
|
| 627 |
|
|
if (little_endian)
|
| 628 |
|
|
a64_s = 0x22222f27;
|
| 629 |
|
|
else
|
| 630 |
|
|
a64_s = 0x222238d9;
|
| 631 |
|
|
a64_r = __builtin_mips_dpau_h_qbl (a64_a, v4i8_b, v4i8_c);
|
| 632 |
|
|
if (a64_r != a64_s)
|
| 633 |
|
|
abort ();
|
| 634 |
|
|
|
| 635 |
|
|
a64_a = 0x22221111;
|
| 636 |
|
|
v4i8_b = (v4i8) {0x12, 0x34, 0x56, 0x78};
|
| 637 |
|
|
v4i8_c = (v4i8) {0xaa, 0x89, 0x11, 0x34};
|
| 638 |
|
|
if (little_endian)
|
| 639 |
|
|
a64_s = 0x222238d9;
|
| 640 |
|
|
else
|
| 641 |
|
|
a64_s = 0x22222f27;
|
| 642 |
|
|
a64_r = __builtin_mips_dpau_h_qbr (a64_a, v4i8_b, v4i8_c);
|
| 643 |
|
|
if (a64_r != a64_s)
|
| 644 |
|
|
abort ();
|
| 645 |
|
|
|
| 646 |
|
|
a64_a = 0x22221111;
|
| 647 |
|
|
v4i8_b = (v4i8) {0x12, 0x34, 0x56, 0x78};
|
| 648 |
|
|
v4i8_c = (v4i8) {0xaa, 0x89, 0x11, 0x34};
|
| 649 |
|
|
if (little_endian)
|
| 650 |
|
|
a64_s = 0x2221f2fb;
|
| 651 |
|
|
else
|
| 652 |
|
|
a64_s = 0x2221e949;
|
| 653 |
|
|
a64_r = __builtin_mips_dpsu_h_qbl (a64_a, v4i8_b, v4i8_c);
|
| 654 |
|
|
if (a64_r != a64_s)
|
| 655 |
|
|
abort ();
|
| 656 |
|
|
|
| 657 |
|
|
a64_a = 0x22221111;
|
| 658 |
|
|
v4i8_b = (v4i8) {0x12, 0x34, 0x56, 0x78};
|
| 659 |
|
|
v4i8_c = (v4i8) {0xaa, 0x89, 0x11, 0x34};
|
| 660 |
|
|
if (little_endian)
|
| 661 |
|
|
a64_s = 0x2221e949;
|
| 662 |
|
|
else
|
| 663 |
|
|
a64_s = 0x2221f2fb;
|
| 664 |
|
|
a64_r = __builtin_mips_dpsu_h_qbr (a64_a, v4i8_b, v4i8_c);
|
| 665 |
|
|
if (a64_r != a64_s)
|
| 666 |
|
|
abort ();
|
| 667 |
|
|
|
| 668 |
|
|
a64_a = 0x00001111;
|
| 669 |
|
|
v2q15_b = (v2q15) {0x8000, 0x5678};
|
| 670 |
|
|
v2q15_c = (v2q15) {0x8000, 0x1111};
|
| 671 |
|
|
a64_s = 0x8b877d00;
|
| 672 |
|
|
a64_r = __builtin_mips_dpaq_s_w_ph (a64_a, v2q15_b, v2q15_c);
|
| 673 |
|
|
if (a64_r != a64_s)
|
| 674 |
|
|
abort ();
|
| 675 |
|
|
|
| 676 |
|
|
a64_a = 0x00001111;
|
| 677 |
|
|
v2q15_b = (v2q15) {0x8000, 0x5678};
|
| 678 |
|
|
v2q15_c = (v2q15) {0x8000, 0x1111};
|
| 679 |
|
|
a64_s = 0xffffffff7478a522LL;
|
| 680 |
|
|
a64_r = __builtin_mips_dpsq_s_w_ph (a64_a, v2q15_b, v2q15_c);
|
| 681 |
|
|
if (a64_r != a64_s)
|
| 682 |
|
|
abort ();
|
| 683 |
|
|
|
| 684 |
|
|
a64_a = 0x00001111;
|
| 685 |
|
|
v2q15_b = (v2q15) {0x8000, 0x5678};
|
| 686 |
|
|
v2q15_c = (v2q15) {0x8000, 0x1111};
|
| 687 |
|
|
if (little_endian)
|
| 688 |
|
|
a64_s = 0xffffffff8b877d02LL;
|
| 689 |
|
|
else
|
| 690 |
|
|
a64_s = 0x7478a520;
|
| 691 |
|
|
a64_r = __builtin_mips_mulsaq_s_w_ph (a64_a, v2q15_b, v2q15_c);
|
| 692 |
|
|
if (a64_r != a64_s)
|
| 693 |
|
|
abort ();
|
| 694 |
|
|
|
| 695 |
|
|
a64_a = 0x00001111;
|
| 696 |
|
|
q31_b = 0x80000000;
|
| 697 |
|
|
q31_c = 0x80000000;
|
| 698 |
|
|
a64_s = 0x7fffffffffffffffLL;
|
| 699 |
|
|
a64_r = __builtin_mips_dpaq_sa_l_w (a64_a, q31_b, q31_c);
|
| 700 |
|
|
if (a64_r != a64_s)
|
| 701 |
|
|
abort ();
|
| 702 |
|
|
|
| 703 |
|
|
a64_a = 0x00001111;
|
| 704 |
|
|
q31_b = 0x80000000;
|
| 705 |
|
|
q31_c = 0x80000000;
|
| 706 |
|
|
a64_s = 0x8000000000001112LL;
|
| 707 |
|
|
a64_r = __builtin_mips_dpsq_sa_l_w (a64_a, q31_b, q31_c);
|
| 708 |
|
|
if (a64_r != a64_s)
|
| 709 |
|
|
abort ();
|
| 710 |
|
|
|
| 711 |
|
|
a64_a = 0x00001111;
|
| 712 |
|
|
v2q15_b = (v2q15) {0x8000, 0x1};
|
| 713 |
|
|
v2q15_c = (v2q15) {0x8000, 0x2};
|
| 714 |
|
|
if (little_endian)
|
| 715 |
|
|
a64_s = 0x1115;
|
| 716 |
|
|
else
|
| 717 |
|
|
a64_s = 0x80001110;
|
| 718 |
|
|
a64_r = __builtin_mips_maq_s_w_phl (a64_a, v2q15_b, v2q15_c);
|
| 719 |
|
|
if (a64_r != a64_s)
|
| 720 |
|
|
abort ();
|
| 721 |
|
|
|
| 722 |
|
|
a64_a = 0x00001111;
|
| 723 |
|
|
v2q15_b = (v2q15) {0x8000, 0x1};
|
| 724 |
|
|
v2q15_c = (v2q15) {0x8000, 0x2};
|
| 725 |
|
|
if (little_endian)
|
| 726 |
|
|
a64_s = 0x80001110;
|
| 727 |
|
|
else
|
| 728 |
|
|
a64_s = 0x1115;
|
| 729 |
|
|
a64_r = __builtin_mips_maq_s_w_phr (a64_a, v2q15_b, v2q15_c);
|
| 730 |
|
|
if (a64_r != a64_s)
|
| 731 |
|
|
abort ();
|
| 732 |
|
|
|
| 733 |
|
|
a64_a = 0x00001111;
|
| 734 |
|
|
v2q15_b = (v2q15) {0x8000, 0x1};
|
| 735 |
|
|
v2q15_c = (v2q15) {0x8000, 0x2};
|
| 736 |
|
|
if (little_endian)
|
| 737 |
|
|
a64_s = 0x1115;
|
| 738 |
|
|
else
|
| 739 |
|
|
a64_s = 0x7fffffff;
|
| 740 |
|
|
a64_r = __builtin_mips_maq_sa_w_phl (a64_a, v2q15_b, v2q15_c);
|
| 741 |
|
|
if (a64_r != a64_s)
|
| 742 |
|
|
abort ();
|
| 743 |
|
|
|
| 744 |
|
|
a64_a = 0x00001111;
|
| 745 |
|
|
v2q15_b = (v2q15) {0x8000, 0x1};
|
| 746 |
|
|
v2q15_c = (v2q15) {0x8000, 0x2};
|
| 747 |
|
|
if (little_endian)
|
| 748 |
|
|
a64_s = 0x7fffffff;
|
| 749 |
|
|
else
|
| 750 |
|
|
a64_s = 0x1115;
|
| 751 |
|
|
a64_r = __builtin_mips_maq_sa_w_phr (a64_a, v2q15_b, v2q15_c);
|
| 752 |
|
|
if (a64_r != a64_s)
|
| 753 |
|
|
abort ();
|
| 754 |
|
|
#endif
|
| 755 |
|
|
|
| 756 |
|
|
i32_a = 0x12345678;
|
| 757 |
|
|
i32_s = 0x00001e6a;
|
| 758 |
|
|
i32_r = __builtin_mips_bitrev (i32_a);
|
| 759 |
|
|
if (i32_r != i32_s)
|
| 760 |
|
|
abort ();
|
| 761 |
|
|
|
| 762 |
|
|
i32_a = 0x00000208; // pos is 8, size is 4
|
| 763 |
|
|
__builtin_mips_wrdsp (i32_a, 31);
|
| 764 |
|
|
i32_a = 0x12345678;
|
| 765 |
|
|
i32_b = 0x87654321;
|
| 766 |
|
|
i32_s = 0x12345178;
|
| 767 |
|
|
i32_r = __builtin_mips_insv (i32_a, i32_b);
|
| 768 |
|
|
if (i32_r != i32_s)
|
| 769 |
|
|
abort ();
|
| 770 |
|
|
|
| 771 |
|
|
v4i8_s = (v4i8) {1, 1, 1, 1};
|
| 772 |
|
|
v4i8_r = __builtin_mips_repl_qb (1);
|
| 773 |
|
|
r = (int) v4i8_r;
|
| 774 |
|
|
s = (int) v4i8_s;
|
| 775 |
|
|
if (r != s)
|
| 776 |
|
|
abort ();
|
| 777 |
|
|
|
| 778 |
|
|
i32_a = 99;
|
| 779 |
|
|
v4i8_s = (v4i8) {99, 99, 99, 99};
|
| 780 |
|
|
v4i8_r = __builtin_mips_repl_qb (i32_a);
|
| 781 |
|
|
r = (int) v4i8_r;
|
| 782 |
|
|
s = (int) v4i8_s;
|
| 783 |
|
|
if (r != s)
|
| 784 |
|
|
abort ();
|
| 785 |
|
|
|
| 786 |
|
|
v2q15_s = (v2q15) {30, 30};
|
| 787 |
|
|
v2q15_r = __builtin_mips_repl_ph (30);
|
| 788 |
|
|
r = (int) v2q15_r;
|
| 789 |
|
|
s = (int) v2q15_s;
|
| 790 |
|
|
if (r != s)
|
| 791 |
|
|
abort ();
|
| 792 |
|
|
|
| 793 |
|
|
i32_a = 0x5612;
|
| 794 |
|
|
v2q15_s = (v2q15) {0x5612, 0x5612};
|
| 795 |
|
|
v2q15_r = __builtin_mips_repl_ph (i32_a);
|
| 796 |
|
|
r = (int) v2q15_r;
|
| 797 |
|
|
s = (int) v2q15_s;
|
| 798 |
|
|
if (r != s)
|
| 799 |
|
|
abort ();
|
| 800 |
|
|
|
| 801 |
|
|
v4i8_a = (v4i8) {0x12, 0x34, 0x56, 0x78};
|
| 802 |
|
|
v4i8_b = (v4i8) {0x12, 0x34, 0x78, 0x56};
|
| 803 |
|
|
if (little_endian)
|
| 804 |
|
|
i32_s = 0x03000000;
|
| 805 |
|
|
else
|
| 806 |
|
|
i32_s = 0x0c000000;
|
| 807 |
|
|
__builtin_mips_cmpu_eq_qb (v4i8_a, v4i8_b);
|
| 808 |
|
|
i32_r = __builtin_mips_rddsp (16);
|
| 809 |
|
|
if (i32_r != i32_s)
|
| 810 |
|
|
abort ();
|
| 811 |
|
|
|
| 812 |
|
|
v4i8_a = (v4i8) {0x12, 0x34, 0x56, 0x78};
|
| 813 |
|
|
v4i8_b = (v4i8) {0x12, 0x34, 0x78, 0x56};
|
| 814 |
|
|
if (little_endian)
|
| 815 |
|
|
i32_s = 0x04000000;
|
| 816 |
|
|
else
|
| 817 |
|
|
i32_s = 0x02000000;
|
| 818 |
|
|
__builtin_mips_cmpu_lt_qb (v4i8_a, v4i8_b);
|
| 819 |
|
|
i32_r = __builtin_mips_rddsp (16);
|
| 820 |
|
|
if (i32_r != i32_s)
|
| 821 |
|
|
abort ();
|
| 822 |
|
|
|
| 823 |
|
|
v4i8_a = (v4i8) {0x12, 0x34, 0x56, 0x78};
|
| 824 |
|
|
v4i8_b = (v4i8) {0x12, 0x34, 0x78, 0x56};
|
| 825 |
|
|
if (little_endian)
|
| 826 |
|
|
i32_s = 0x07000000;
|
| 827 |
|
|
else
|
| 828 |
|
|
i32_s = 0x0e000000;
|
| 829 |
|
|
__builtin_mips_cmpu_le_qb (v4i8_a, v4i8_b);
|
| 830 |
|
|
i32_r = __builtin_mips_rddsp (16);
|
| 831 |
|
|
if (i32_r != i32_s)
|
| 832 |
|
|
abort ();
|
| 833 |
|
|
|
| 834 |
|
|
v4i8_a = (v4i8) {0x12, 0x34, 0x56, 0x78};
|
| 835 |
|
|
v4i8_b = (v4i8) {0x12, 0x34, 0x78, 0x56};
|
| 836 |
|
|
if (little_endian)
|
| 837 |
|
|
i32_s = 0x3;
|
| 838 |
|
|
else
|
| 839 |
|
|
i32_s = 0xc;
|
| 840 |
|
|
i32_r=__builtin_mips_cmpgu_eq_qb (v4i8_a, v4i8_b);
|
| 841 |
|
|
if (i32_r != i32_s)
|
| 842 |
|
|
abort ();
|
| 843 |
|
|
|
| 844 |
|
|
v4i8_a = (v4i8) {0x12, 0x34, 0x56, 0x78};
|
| 845 |
|
|
v4i8_b = (v4i8) {0x12, 0x34, 0x78, 0x56};
|
| 846 |
|
|
if (little_endian)
|
| 847 |
|
|
i32_s = 0x4;
|
| 848 |
|
|
else
|
| 849 |
|
|
i32_s = 0x2;
|
| 850 |
|
|
i32_r = __builtin_mips_cmpgu_lt_qb (v4i8_a, v4i8_b);
|
| 851 |
|
|
if (i32_r != i32_s)
|
| 852 |
|
|
abort ();
|
| 853 |
|
|
|
| 854 |
|
|
v4i8_a = (v4i8) {0x12, 0x34, 0x56, 0x78};
|
| 855 |
|
|
v4i8_b = (v4i8) {0x12, 0x34, 0x78, 0x56};
|
| 856 |
|
|
if (little_endian)
|
| 857 |
|
|
i32_s = 0x7;
|
| 858 |
|
|
else
|
| 859 |
|
|
i32_s = 0xe;
|
| 860 |
|
|
i32_r = __builtin_mips_cmpgu_le_qb (v4i8_a, v4i8_b);
|
| 861 |
|
|
if (i32_r != i32_s)
|
| 862 |
|
|
abort ();
|
| 863 |
|
|
|
| 864 |
|
|
__builtin_mips_wrdsp (0,31); // Clear all condition code bits.
|
| 865 |
|
|
v2q15_a = (v2q15) {0x1234, 0x5678};
|
| 866 |
|
|
v2q15_b = (v2q15) {0x1234, 0x7856};
|
| 867 |
|
|
if (little_endian)
|
| 868 |
|
|
i32_s = 0x01000000;
|
| 869 |
|
|
else
|
| 870 |
|
|
i32_s = 0x02000000;
|
| 871 |
|
|
__builtin_mips_cmp_eq_ph (v2q15_a, v2q15_b);
|
| 872 |
|
|
i32_r = __builtin_mips_rddsp (16);
|
| 873 |
|
|
if (i32_r != i32_s)
|
| 874 |
|
|
abort ();
|
| 875 |
|
|
|
| 876 |
|
|
v2q15_a = (v2q15) {0x1234, 0x5678};
|
| 877 |
|
|
v2q15_b = (v2q15) {0x1234, 0x7856};
|
| 878 |
|
|
if (little_endian)
|
| 879 |
|
|
i32_s = 0x02000000;
|
| 880 |
|
|
else
|
| 881 |
|
|
i32_s = 0x01000000;
|
| 882 |
|
|
__builtin_mips_cmp_lt_ph (v2q15_a, v2q15_b);
|
| 883 |
|
|
i32_r = __builtin_mips_rddsp (16);
|
| 884 |
|
|
if (i32_r != i32_s)
|
| 885 |
|
|
abort ();
|
| 886 |
|
|
|
| 887 |
|
|
v2q15_a = (v2q15) {0x1234, 0x5678};
|
| 888 |
|
|
v2q15_b = (v2q15) {0x1234, 0x7856};
|
| 889 |
|
|
i32_s = 0x03000000;
|
| 890 |
|
|
__builtin_mips_cmp_le_ph (v2q15_a, v2q15_b);
|
| 891 |
|
|
i32_r = __builtin_mips_rddsp (16);
|
| 892 |
|
|
if (i32_r != i32_s)
|
| 893 |
|
|
abort ();
|
| 894 |
|
|
|
| 895 |
|
|
i32_a = 0x0a000000; // cc: 0000 1010
|
| 896 |
|
|
__builtin_mips_wrdsp (i32_a, 31);
|
| 897 |
|
|
v4i8_a = (v4i8) {0x12, 0x34, 0x56, 0x78};
|
| 898 |
|
|
v4i8_b = (v4i8) {0x21, 0x43, 0x65, 0x87};
|
| 899 |
|
|
if (little_endian)
|
| 900 |
|
|
v4i8_s = (v4i8) {0x21, 0x34, 0x65, 0x78};
|
| 901 |
|
|
else
|
| 902 |
|
|
v4i8_s = (v4i8) {0x12, 0x43, 0x56, 0x87};
|
| 903 |
|
|
v4i8_r = __builtin_mips_pick_qb (v4i8_a, v4i8_b);
|
| 904 |
|
|
r = (int) v4i8_r;
|
| 905 |
|
|
s = (int) v4i8_s;
|
| 906 |
|
|
if (r != s)
|
| 907 |
|
|
abort ();
|
| 908 |
|
|
|
| 909 |
|
|
i32_a = 0x02000000; // cc: 0000 0010
|
| 910 |
|
|
__builtin_mips_wrdsp (i32_a, 31);
|
| 911 |
|
|
v2q15_a = (v2q15) {0x1234, 0x5678};
|
| 912 |
|
|
v2q15_b = (v2q15) {0x2143, 0x6587};
|
| 913 |
|
|
if (little_endian)
|
| 914 |
|
|
v2q15_s = (v2q15) {0x2143, 0x5678};
|
| 915 |
|
|
else
|
| 916 |
|
|
v2q15_s = (v2q15) {0x1234, 0x6587};
|
| 917 |
|
|
v2q15_r = __builtin_mips_pick_ph (v2q15_a, v2q15_b);
|
| 918 |
|
|
r = (int) v2q15_r;
|
| 919 |
|
|
s = (int) v2q15_s;
|
| 920 |
|
|
if (r != s)
|
| 921 |
|
|
abort ();
|
| 922 |
|
|
|
| 923 |
|
|
v2q15_a = (v2q15) {0x1234, 0x5678};
|
| 924 |
|
|
v2q15_b = (v2q15) {0x1234, 0x7856};
|
| 925 |
|
|
if (little_endian)
|
| 926 |
|
|
v2q15_s = (v2q15) {0x7856, 0x1234};
|
| 927 |
|
|
else
|
| 928 |
|
|
v2q15_s = (v2q15) {0x5678, 0x1234};
|
| 929 |
|
|
v2q15_r = __builtin_mips_packrl_ph (v2q15_a, v2q15_b);
|
| 930 |
|
|
r = (int) v2q15_r;
|
| 931 |
|
|
s = (int) v2q15_s;
|
| 932 |
|
|
if (r != s)
|
| 933 |
|
|
abort ();
|
| 934 |
|
|
|
| 935 |
|
|
#ifndef __mips64
|
| 936 |
|
|
a64_a = 0x1234567887654321LL;
|
| 937 |
|
|
i32_s = 0x88765432;
|
| 938 |
|
|
i32_r = __builtin_mips_extr_w (a64_a, 4);
|
| 939 |
|
|
if (i32_r != i32_s)
|
| 940 |
|
|
abort ();
|
| 941 |
|
|
|
| 942 |
|
|
a64_a = 0x1234567887658321LL;
|
| 943 |
|
|
i32_s = 0x56788766;
|
| 944 |
|
|
i32_r = __builtin_mips_extr_r_w (a64_a, 16);
|
| 945 |
|
|
if (i32_r != i32_s)
|
| 946 |
|
|
abort ();
|
| 947 |
|
|
|
| 948 |
|
|
a64_a = 0x12345677fffffff8LL;
|
| 949 |
|
|
i32_s = 0x7fffffff;
|
| 950 |
|
|
i32_r = __builtin_mips_extr_rs_w (a64_a, 4);
|
| 951 |
|
|
if (i32_r != i32_s)
|
| 952 |
|
|
abort ();
|
| 953 |
|
|
|
| 954 |
|
|
a64_a = 0x1234567887658321LL;
|
| 955 |
|
|
i32_s = 0x7fff;
|
| 956 |
|
|
i32_r = __builtin_mips_extr_s_h (a64_a, 16);
|
| 957 |
|
|
if (i32_r != i32_s)
|
| 958 |
|
|
abort ();
|
| 959 |
|
|
|
| 960 |
|
|
a64_a = 0x0000007887658321LL;
|
| 961 |
|
|
i32_b = 24;
|
| 962 |
|
|
i32_s = 0x7887;
|
| 963 |
|
|
i32_r = __builtin_mips_extr_s_h (a64_a, i32_b);
|
| 964 |
|
|
if (i32_r != i32_s)
|
| 965 |
|
|
abort ();
|
| 966 |
|
|
|
| 967 |
|
|
a64_a = 0x1234567887654321LL;
|
| 968 |
|
|
i32_b = 4;
|
| 969 |
|
|
i32_s = 0x88765432;
|
| 970 |
|
|
i32_r = __builtin_mips_extr_w (a64_a, i32_b);
|
| 971 |
|
|
if (i32_r != i32_s)
|
| 972 |
|
|
abort ();
|
| 973 |
|
|
|
| 974 |
|
|
a64_a = 0x1234567887658321LL;
|
| 975 |
|
|
i32_b = 16;
|
| 976 |
|
|
i32_s = 0x56788766;
|
| 977 |
|
|
i32_r = __builtin_mips_extr_r_w (a64_a, i32_b);
|
| 978 |
|
|
if (i32_r != i32_s)
|
| 979 |
|
|
abort ();
|
| 980 |
|
|
|
| 981 |
|
|
a64_a = 0x12345677fffffff8LL;
|
| 982 |
|
|
i32_b = 4;
|
| 983 |
|
|
i32_s = 0x7fffffff;
|
| 984 |
|
|
i32_r = __builtin_mips_extr_rs_w (a64_a, i32_b);
|
| 985 |
|
|
if (i32_r != i32_s)
|
| 986 |
|
|
abort ();
|
| 987 |
|
|
|
| 988 |
|
|
i32_a = 0x0000021f; // pos is 31
|
| 989 |
|
|
__builtin_mips_wrdsp (i32_a, 31);
|
| 990 |
|
|
a64_a = 0x1234567887654321LL;
|
| 991 |
|
|
i32_s = 8;
|
| 992 |
|
|
i32_r = __builtin_mips_extp (a64_a, 3); // extract 4 bits
|
| 993 |
|
|
if (i32_r != i32_s)
|
| 994 |
|
|
abort ();
|
| 995 |
|
|
|
| 996 |
|
|
i32_a = 0x0000021f; // pos is 31
|
| 997 |
|
|
__builtin_mips_wrdsp (i32_a, 31);
|
| 998 |
|
|
a64_a = 0x1234567887654321LL;
|
| 999 |
|
|
i32_b = 7; // size is 8. NOTE!! we should use 7
|
| 1000 |
|
|
i32_s = 0x87;
|
| 1001 |
|
|
i32_r = __builtin_mips_extp (a64_a, i32_b);
|
| 1002 |
|
|
if (i32_r != i32_s)
|
| 1003 |
|
|
abort ();
|
| 1004 |
|
|
|
| 1005 |
|
|
i32_a = 0x0000021f; // pos is 31
|
| 1006 |
|
|
__builtin_mips_wrdsp (i32_a, 31);
|
| 1007 |
|
|
a64_a = 0x1234567887654321LL;
|
| 1008 |
|
|
i32_s = 8;
|
| 1009 |
|
|
i32_r = __builtin_mips_extpdp (a64_a, 3); // extract 4 bits
|
| 1010 |
|
|
if (i32_r != i32_s)
|
| 1011 |
|
|
abort ();
|
| 1012 |
|
|
|
| 1013 |
|
|
i32_s = 0x0000021b; // pos is 27
|
| 1014 |
|
|
i32_r = __builtin_mips_rddsp (31);
|
| 1015 |
|
|
if (i32_r != i32_s)
|
| 1016 |
|
|
abort ();
|
| 1017 |
|
|
|
| 1018 |
|
|
i32_a = 0x0000021f; // pos is 31
|
| 1019 |
|
|
__builtin_mips_wrdsp (i32_a, 31);
|
| 1020 |
|
|
a64_a = 0x1234567887654321LL;
|
| 1021 |
|
|
i32_b = 11; // size is 12. NOTE!!! We should use 11
|
| 1022 |
|
|
i32_s = 0x876;
|
| 1023 |
|
|
i32_r = __builtin_mips_extpdp (a64_a, i32_b);
|
| 1024 |
|
|
if (i32_r != i32_s)
|
| 1025 |
|
|
abort ();
|
| 1026 |
|
|
|
| 1027 |
|
|
i32_s = 0x00000213; // pos is 19
|
| 1028 |
|
|
i32_r = __builtin_mips_rddsp (31);
|
| 1029 |
|
|
if (i32_r != i32_s)
|
| 1030 |
|
|
abort ();
|
| 1031 |
|
|
|
| 1032 |
|
|
a64_a = 0x1234567887654321LL;
|
| 1033 |
|
|
a64_s = 0x0012345678876543LL;
|
| 1034 |
|
|
a64_r = __builtin_mips_shilo (a64_a, 8);
|
| 1035 |
|
|
if (a64_r != a64_s)
|
| 1036 |
|
|
abort ();
|
| 1037 |
|
|
|
| 1038 |
|
|
a64_a = 0x1234567887654321LL;
|
| 1039 |
|
|
i32_b = -16;
|
| 1040 |
|
|
a64_s = 0x5678876543210000LL;
|
| 1041 |
|
|
a64_r = __builtin_mips_shilo (a64_a, i32_b);
|
| 1042 |
|
|
if (a64_r != a64_s)
|
| 1043 |
|
|
abort ();
|
| 1044 |
|
|
|
| 1045 |
|
|
i32_a = 0x0;
|
| 1046 |
|
|
__builtin_mips_wrdsp (i32_a, 31);
|
| 1047 |
|
|
a64_a = 0x1234567887654321LL;
|
| 1048 |
|
|
i32_b = 0x11112222;
|
| 1049 |
|
|
a64_s = 0x8765432111112222LL;
|
| 1050 |
|
|
a64_r = __builtin_mips_mthlip (a64_a, i32_b);
|
| 1051 |
|
|
if (a64_r != a64_s)
|
| 1052 |
|
|
abort ();
|
| 1053 |
|
|
i32_s = 32;
|
| 1054 |
|
|
i32_r = __builtin_mips_rddsp (31);
|
| 1055 |
|
|
if (i32_r != i32_s)
|
| 1056 |
|
|
abort ();
|
| 1057 |
|
|
#endif
|
| 1058 |
|
|
|
| 1059 |
|
|
i32_a = 0x1357a468;
|
| 1060 |
|
|
__builtin_mips_wrdsp (i32_a, 63);
|
| 1061 |
|
|
i32_s = 0x03572428;
|
| 1062 |
|
|
i32_r = __builtin_mips_rddsp (63);
|
| 1063 |
|
|
if (i32_r != i32_s)
|
| 1064 |
|
|
abort ();
|
| 1065 |
|
|
|
| 1066 |
|
|
ptr_a = &array;
|
| 1067 |
|
|
i32_b = 37;
|
| 1068 |
|
|
i32_s = 37;
|
| 1069 |
|
|
i32_r = __builtin_mips_lbux (ptr_a, i32_b);
|
| 1070 |
|
|
if (i32_r != i32_s)
|
| 1071 |
|
|
abort ();
|
| 1072 |
|
|
|
| 1073 |
|
|
ptr_a = &array;
|
| 1074 |
|
|
i32_b = 38;
|
| 1075 |
|
|
if (little_endian)
|
| 1076 |
|
|
i32_s = 0x2726;
|
| 1077 |
|
|
else
|
| 1078 |
|
|
i32_s = 0x2627;
|
| 1079 |
|
|
i32_r = __builtin_mips_lhx (ptr_a, i32_b);
|
| 1080 |
|
|
if (i32_r != i32_s)
|
| 1081 |
|
|
abort ();
|
| 1082 |
|
|
|
| 1083 |
|
|
ptr_a = &array;
|
| 1084 |
|
|
i32_b = 40;
|
| 1085 |
|
|
if (little_endian)
|
| 1086 |
|
|
i32_s = 0x2b2a2928;
|
| 1087 |
|
|
else
|
| 1088 |
|
|
i32_s = 0x28292a2b;
|
| 1089 |
|
|
i32_r = __builtin_mips_lwx (ptr_a, i32_b);
|
| 1090 |
|
|
if (i32_r != i32_s)
|
| 1091 |
|
|
abort ();
|
| 1092 |
|
|
|
| 1093 |
|
|
i32_a = 0x00000220; // pos is 32, size is 4
|
| 1094 |
|
|
__builtin_mips_wrdsp (i32_a, 63);
|
| 1095 |
|
|
i32_s = 1;
|
| 1096 |
|
|
i32_r = __builtin_mips_bposge32 ();
|
| 1097 |
|
|
if (i32_r != i32_s)
|
| 1098 |
|
|
abort ();
|
| 1099 |
|
|
|
| 1100 |
|
|
#ifndef __mips64
|
| 1101 |
|
|
a64_a = 0x12345678;
|
| 1102 |
|
|
i32_b = 0x80000000;
|
| 1103 |
|
|
i32_c = 0x11112222;
|
| 1104 |
|
|
a64_s = 0xF7776EEF12345678LL;
|
| 1105 |
|
|
a64_r = __builtin_mips_madd (a64_a, i32_b, i32_c);
|
| 1106 |
|
|
if (a64_r != a64_s)
|
| 1107 |
|
|
abort ();
|
| 1108 |
|
|
#endif
|
| 1109 |
|
|
|
| 1110 |
|
|
#ifndef __mips64
|
| 1111 |
|
|
a64_a = 0x12345678;
|
| 1112 |
|
|
ui32_b = 0x80000000;
|
| 1113 |
|
|
ui32_c = 0x11112222;
|
| 1114 |
|
|
a64_s = 0x0888911112345678LL;
|
| 1115 |
|
|
a64_r = __builtin_mips_maddu (a64_a, ui32_b, ui32_c);
|
| 1116 |
|
|
if (a64_r != a64_s)
|
| 1117 |
|
|
abort ();
|
| 1118 |
|
|
#endif
|
| 1119 |
|
|
|
| 1120 |
|
|
#ifndef __mips64
|
| 1121 |
|
|
a64_a = 0x12345678;
|
| 1122 |
|
|
i32_b = 0x80000000;
|
| 1123 |
|
|
i32_c = 0x11112222;
|
| 1124 |
|
|
a64_s = 0x0888911112345678LL;
|
| 1125 |
|
|
a64_r = __builtin_mips_msub (a64_a, i32_b, i32_c);
|
| 1126 |
|
|
if (a64_r != a64_s)
|
| 1127 |
|
|
abort ();
|
| 1128 |
|
|
#endif
|
| 1129 |
|
|
|
| 1130 |
|
|
#ifndef __mips64
|
| 1131 |
|
|
a64_a = 0x12345678;
|
| 1132 |
|
|
ui32_b = 0x80000000;
|
| 1133 |
|
|
ui32_c = 0x11112222;
|
| 1134 |
|
|
a64_s = 0xF7776EEF12345678LL;
|
| 1135 |
|
|
a64_r = __builtin_mips_msubu (a64_a, ui32_b, ui32_c);
|
| 1136 |
|
|
if (a64_r != a64_s)
|
| 1137 |
|
|
abort ();
|
| 1138 |
|
|
#endif
|
| 1139 |
|
|
|
| 1140 |
|
|
#ifndef __mips64
|
| 1141 |
|
|
i32_a = 0x80000000;
|
| 1142 |
|
|
i32_b = 0x11112222;
|
| 1143 |
|
|
a64_s = 0xF7776EEF00000000LL;
|
| 1144 |
|
|
a64_r = __builtin_mips_mult (i32_a, i32_b);
|
| 1145 |
|
|
if (a64_r != a64_s)
|
| 1146 |
|
|
abort ();
|
| 1147 |
|
|
#endif
|
| 1148 |
|
|
|
| 1149 |
|
|
#ifndef __mips64
|
| 1150 |
|
|
ui32_a = 0x80000000;
|
| 1151 |
|
|
ui32_b = 0x11112222;
|
| 1152 |
|
|
a64_s = 0x888911100000000LL;
|
| 1153 |
|
|
a64_r = __builtin_mips_multu (ui32_a, ui32_b);
|
| 1154 |
|
|
if (a64_r != a64_s)
|
| 1155 |
|
|
abort ();
|
| 1156 |
|
|
#endif
|
| 1157 |
|
|
}
|
| 1158 |
|
|
|
