URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.target/] [mips/] [msub-8.c] - Blame information for rev 724

Line No.	Rev	Author	Line
1	691	jeremybenn	`/* { dg-options "-O2 -march=5kc" } */`
2			`/* { dg-final { scan-assembler "\tmul\t" } } */`
3			`/* { dg-final { scan-assembler-not "\tmsub\t" } } */`
4			`/* { dg-final { scan-assembler-not "\tmtlo\t" } } */`
5			`/* { dg-final { scan-assembler-not "\tmflo\t" } } */`
6
7			`NOMIPS16 int`
8			`f2 (int x, int y, int z)`
9			`{`
10			`asm volatile ("" ::: "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", "$9",`
11			`"$10", "$11", "$12", "$13", "$14", "$15", "$16", "$17",`
12			`"$18", "$19", "$20", "$21", "$22", "$23", "$24", "$25",`
13			`"$31");`
14			`return x - y * z;`
15			`}`