OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.target/] [mips/] [octeon-seq-4.c] - Blame information for rev 704

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 691 jeremybenn
/* { dg-do compile } */
2
/* { dg-options "-O2 -march=octeon" } */
3
/* { dg-final { scan-assembler-not "xor" } } */
4
 
5
unsigned
6
m (unsigned e);
7
 
8
NOMIPS16 void
9
f (unsigned i)
10
{
11
  unsigned j = m (i);
12
  h (j, i != j);
13
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.