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[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.target/] [mips/] [r10k-cache-barrier-10.c] - Blame information for rev 704

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/* { dg-options "-O2 -mr10k-cache-barrier=store -mips4 -mbranch-likely -mno-abicalls" } */
int bar (int);
 
/* Test that code after a branch-likely does not get an unnecessary
   cache barrier.  */
 
NOMIPS16 void
foo (int n, int *x)
{
  do
    n = bar (n * 4 + 1);
  while (n);
  /* The preceding branch should be a branch likely, with the shift as
     its delay slot.  We therefore don't need a cache barrier here.  */
  x[0] = 0;
}
 
/* { dg-final { scan-assembler-not "\tcache\t" } } */

Line No.	Rev	Author	Line
1	691	jeremybenn	`/* { dg-options "-O2 -mr10k-cache-barrier=store -mips4 -mbranch-likely -mno-abicalls" } */`
2			`int bar (int);`
3
4			`/* Test that code after a branch-likely does not get an unnecessary`
5			`cache barrier. */`
6
7			`NOMIPS16 void`
8			`foo (int n, int *x)`
9			`{`
10			`do`
11			`n = bar (n * 4 + 1);`
12			`while (n);`
13			`/* The preceding branch should be a branch likely, with the shift as`
14			`its delay slot. We therefore don't need a cache barrier here. */`
15			`x[0] = 0;`
16			`}`
17
18			`/* { dg-final { scan-assembler-not "\tcache\t" } } */`

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[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.target/] [mips/] [r10k-cache-barrier-10.c] - Blame information for rev 704