OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.target/] [powerpc/] [440-maclhw-2.c] - Blame information for rev 691

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 691 jeremybenn
/* Test generation of maclhw. on 440.  */
2
/* Origin: Joseph Myers <joseph@codesourcery.com> */
3
/* { dg-do compile } */
4
/* { dg-require-effective-target ilp32 } */
5
/* { dg-options "-O2 -mcpu=440" } */
6
 
7
/* { dg-final { scan-assembler "maclhw\\. " } } */
8
 
9
int
10
f(int a, int b, int c)
11
{
12
  a += (short)b * (short)c;
13
  if (!a)
14
    return 10;
15
  return a;
16
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.