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[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.target/] [powerpc/] [altivec-18.c] - Blame information for rev 696

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Line No. Rev Author Line
1 691 jeremybenn
/* { dg-do compile { target powerpc*-*-* } } */
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/* { dg-require-effective-target powerpc_altivec_ok } */
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/* { dg-options "-maltivec -mabi=altivec" } */
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/* { dg-final { scan-assembler "vcmpgtub" { target *-*-linux* } } } */
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/* { dg-final { scan-assembler "vcmpgtsb" { target *-*-darwin* } } } */
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/* { dg-final { scan-assembler "vcmpgtsh" } } */
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/* { dg-final { scan-assembler "vcmpgtsw" } } */
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/* Verify a statement in the GCC Manual that vector type specifiers can
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   omit "signed" or "unsigned".  The default is the default signedness
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   of the base type, which differs depending on the ABI.  */
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#include <altivec.h>
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extern vector char vc1, vc2;
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extern vector short vs1, vs2;
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extern vector int vi1, vi2;
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int signedness (void)
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{
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    return vec_all_le (vc1, vc2)
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           && vec_all_le (vs1, vs2)
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           && vec_all_le (vi1, vi2);
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}

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