OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.target/] [powerpc/] [pr48258-1.c] - Blame information for rev 691

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 691 jeremybenn
/* { dg-do compile } */
2
/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */
3
/* { dg-require-effective-target powerpc_vsx_ok } */
4
/* { dg-options "-O3 -mcpu=power7 -mabi=altivec -ffast-math -fno-unroll-loops" } */
5
/* { dg-final { scan-assembler-times "xvaddsp" 3 } } */
6
/* { dg-final { scan-assembler-times "xvminsp" 3 } } */
7
/* { dg-final { scan-assembler-times "xvmaxsp" 3 } } */
8
/* { dg-final { scan-assembler-times "xxsldwi" 6 } } */
9
/* { dg-final { scan-assembler-times "xscvspdp" 3 } } */
10
/* { dg-final { scan-assembler-not "stvewx" } } */
11
/* { dg-final { scan-assembler-not "stvx" } } */
12
/* { dg-final { scan-assembler-not "stxvd2x" } } */
13
/* { dg-final { scan-assembler-not "stxvw4x" } } */
14
 
15
#include <stddef.h>
16
 
17
#ifndef SIZE
18
#define SIZE 1024
19
#endif
20
 
21
float values[SIZE] __attribute__((__aligned__(32)));
22
 
23
float
24
vector_sum (void)
25
{
26
  size_t i;
27
  float sum = 0.0f;
28
 
29
  for (i = 0; i < SIZE; i++)
30
    sum += values[i];
31
 
32
  return sum;
33
}
34
 
35
float
36
vector_min (void)
37
{
38
  size_t i;
39
  float min = values[0];
40
 
41
  for (i = 0; i < SIZE; i++)
42
    min = __builtin_fminf (min, values[i]);
43
 
44
  return min;
45
}
46
 
47
float
48
vector_max (void)
49
{
50
  size_t i;
51
  float max = values[0];
52
 
53
  for (i = 0; i < SIZE; i++)
54
    max = __builtin_fmaxf (max, values[i]);
55
 
56
  return max;
57
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.