OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.target/] [powerpc/] [spe-vector-memset.c] - Blame information for rev 801

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 691 jeremybenn
/* { dg-do compile { target powerpc*-*-* } } */
2
/* { dg-require-effective-target powerpc_spe } */
3
/* { dg-options "-O -mspe=yes" } */
4
/* { dg-final { scan-assembler "evstdd" } } */
5
 
6
#include <string.h>
7
 
8
void foo(void)
9
{
10
  int x[8] __attribute__((aligned(64)));
11
  memset (x, 0, sizeof (x));
12
  bar (x);
13
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.