URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.target/] [powerpc/] [vsx-builtin-5.c] - Blame information for rev 801

Go to most recent revision | Details | Compare with Previous | View Log


/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */
/* { dg-require-effective-target powerpc_vsx_ok } */
/* { dg-options "-O2 -mcpu=power7" } */
/* { dg-final { scan-assembler "xxpermdi" } } */
/* { dg-final { scan-assembler-not "stxvd2x" } } */
 
/* Make sure double extract doesn't use a store instruction.  */
 
double d0(__vector double v){ return __builtin_vec_extract (v, 0); }
double d1(__vector double v){ return __builtin_vec_extract (v, 1); }
 
double e0(vector double v){ return __builtin_vec_ext_v2df (v, 0); }
double e1(vector double v){ return __builtin_vec_ext_v2df (v, 1); }

Line No.	Rev	Author	Line
1	691	jeremybenn	`/* { dg-do compile { target { powerpc--* && lp64 } } } */`
2			`/* { dg-skip-if "" { powerpc--darwin* } { "" } { "" } } /`
3			`/* { dg-require-effective-target powerpc_vsx_ok } */`
4			`/* { dg-options "-O2 -mcpu=power7" } */`
5			`/* { dg-final { scan-assembler "xxpermdi" } } */`
6			`/* { dg-final { scan-assembler-not "stxvd2x" } } */`
7
8			`/* Make sure double extract doesn't use a store instruction. */`
9
10			`double d0(__vector double v){ return __builtin_vec_extract (v, 0); }`
11			`double d1(__vector double v){ return __builtin_vec_extract (v, 1); }`
12
13			`double e0(vector double v){ return __builtin_vec_ext_v2df (v, 0); }`
14			`double e1(vector double v){ return __builtin_vec_ext_v2df (v, 1); }`

Browse

Tools

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.target/] [powerpc/] [vsx-builtin-5.c] - Blame information for rev 801