OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.target/] [powerpc/] [warn-2.c] - Blame information for rev 801

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 691 jeremybenn
/* { dg-do compile { target { powerpc*-*-* } } } */
2
/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */
3
/* { dg-require-effective-target powerpc_vsx_ok } */
4
/* { dg-options "-O -mcpu=power7 -mno-altivec" } */
5
 
6
/* { dg-warning "-mno-altivec disables vsx" "" { target *-*-* } 1 } */
7
 
8
double
9
foo (double *x, double *y)
10
{
11
  double z[2];
12
  int i;
13
 
14
  for (i = 0; i < 2; i++)
15
    z[i] = x[i] + y[i];
16
  return z[0] * z[1];
17
}
18
 
19
/* { dg-final { scan-assembler-not "xsadddp" } } */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.