OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.target/] [s390/] [20090223-1.c] - Blame information for rev 691

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 691 jeremybenn
/* The RTL loop optimizer used to replace the output register of the
2
   inline assembly with a pseudo although the variable is declared as
3
   register asm ("0").  */
4
 
5
/* { dg-do run } */
6
/* { dg-options "-O2 -Wno-attributes" } */
7
 
8
extern void abort (void);
9
 
10
static unsigned char __attribute__ ((always_inline))
11
mytoupper (unsigned char c)
12
{
13
  if (c >= 'a' && c <= 'z')
14
    c -= 'a' - 'A';
15
  return c;
16
}
17
 
18
static unsigned long __attribute__ ((always_inline))
19
strlen (const char *s)
20
{
21
  register unsigned long r0 asm ("0");
22
  const char *tmp = s;
23
 
24
  asm (
25
#ifdef __s390x__
26
       "  lghi  %0, 0\n"
27
#else
28
       "  lhi   %0, 0\n"
29
#endif
30
       "0:srst  %0,%1\n"
31
       "  jo    0b"
32
       : "=d" (r0), "+a" (tmp)
33
       :
34
       :"cc");
35
  return r0 - (unsigned long) s;
36
}
37
 
38
char boot_command_line[] = "this is a test";
39
 
40
void __attribute__ ((noinline))
41
foo (char *str)
42
{
43
  if (strcmp (str, "THIS IS A TEST") != 0)
44
    abort ();
45
}
46
 
47
int
48
main ()
49
{
50
  char upper_command_line[1024];
51
  int i;
52
 
53
  for (i = 0; i < strlen (boot_command_line); i++)
54
    upper_command_line[i] = mytoupper (boot_command_line[i]);
55
 
56
  upper_command_line[strlen (boot_command_line)] = 0;
57
  foo (upper_command_line);
58
 
59
  return 0;
60
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.