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[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.target/] [sparc/] [fexpand.c] - Blame information for rev 711

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/* { dg-do compile } */
/* { dg-options "-mcpu=ultrasparc -mvis" } */
typedef short vec16 __attribute__((vector_size(8)));
typedef unsigned char vec8 __attribute__((vector_size(4)));
 
vec16 foo (vec8 a) {
  return __builtin_vis_fexpand (a);
}
 
/* { dg-final { scan-assembler "fexpand\t%" } } */

Line No.	Rev	Author	Line
1	691	jeremybenn	`/* { dg-do compile } */`
2			`/* { dg-options "-mcpu=ultrasparc -mvis" } */`
3			`typedef short vec16 __attribute__((vector_size(8)));`
4			`typedef unsigned char vec8 __attribute__((vector_size(4)));`
5
6			`vec16 foo (vec8 a) {`
7			`return __builtin_vis_fexpand (a);`
8			`}`
9
10			`/* { dg-final { scan-assembler "fexpand\t%" } } */`

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[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.target/] [sparc/] [fexpand.c] - Blame information for rev 711