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[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.target/] [sparc/] [fpack32.c] - Blame information for rev 801

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/* { dg-do compile } */
/* { dg-options "-mcpu=ultrasparc -mvis" } */
typedef int vec32 __attribute__((vector_size(8)));
typedef unsigned char vec8 __attribute__((vector_size(8)));
 
vec8 foo (vec32 a, vec8 b) {
  return __builtin_vis_fpack32 (a, b);
}
 
/* { dg-final { scan-assembler "fpack32\t%" } } */

Line No.	Rev	Author	Line
1	691	jeremybenn	`/* { dg-do compile } */`
2			`/* { dg-options "-mcpu=ultrasparc -mvis" } */`
3			`typedef int vec32 __attribute__((vector_size(8)));`
4			`typedef unsigned char vec8 __attribute__((vector_size(8)));`
5
6			`vec8 foo (vec32 a, vec8 b) {`
7			`return __builtin_vis_fpack32 (a, b);`
8			`}`
9
10			`/* { dg-final { scan-assembler "fpack32\t%" } } */`

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[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.target/] [sparc/] [fpack32.c] - Blame information for rev 801