OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [gcc/] [testsuite/] [gcc.target/] [sparc/] [fshift.c] - Blame information for rev 691

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 691 jeremybenn 
/* { dg-do compile } */
2 
/* { dg-options "-mvis3" } */
3 
typedef int __v2si __attribute__((vector_size(8)));
4 
typedef short __v4hi __attribute__((vector_size(8)));
5 
 
6 
__v4hi test_fsll16 (__v4hi x, __v4hi y)
7 
{
8 
  return __builtin_vis_fsll16 (x, y);
9 
}
10 
 
11 
__v4hi test_fslas16 (__v4hi x, __v4hi y)
12 
{
13 
  return __builtin_vis_fslas16 (x, y);
14 
}
15 
 
16 
__v4hi test_fsrl16 (__v4hi x, __v4hi y)
17 
{
18 
  return __builtin_vis_fsrl16 (x, y);
19 
}
20 
 
21 
__v4hi test_fsra16 (__v4hi x, __v4hi y)
22 
{
23 
  return __builtin_vis_fsra16 (x, y);
24 
}
25 
 
26 
__v2si test_fsll32 (__v2si x, __v2si y)
27 
{
28 
  return __builtin_vis_fsll32 (x, y);
29 
}
30 
 
31 
__v2si test_fslas32 (__v2si x, __v2si y)
32 
{
33 
  return __builtin_vis_fslas32 (x, y);
34 
}
35 
 
36 
__v2si test_fsrl32 (__v2si x, __v2si y)
37 
{
38 
  return __builtin_vis_fsrl32 (x, y);
39 
}
40 
 
41 
__v2si test_fsra32 (__v2si x, __v2si y)
42 
{
43 
  return __builtin_vis_fsra32 (x, y);
44 
}
45 
 
46 
/* { dg-final { scan-assembler "fsll16\t%" } } */
47 
/* { dg-final { scan-assembler "fslas16\t%" } } */
48 
/* { dg-final { scan-assembler "fsrl16\t%" } } */
49 
/* { dg-final { scan-assembler "fsra16\t%" } } */
50 
/* { dg-final { scan-assembler "fsll32\t%" } } */
51 
/* { dg-final { scan-assembler "fslas32\t%" } } */
52 
/* { dg-final { scan-assembler "fsrl32\t%" } } */
53 
/* { dg-final { scan-assembler "fsra32\t%" } } */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.