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jeremybenn |
# Copyright (C) 1999, 2001, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010,
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# 2011, 2012 Free Software Foundation, Inc.
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; either version 3 of the License, or
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# (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with GCC; see the file COPYING3. If not see
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# .
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# Please email any bugs, comments, and/or additions to this file to:
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# gcc-patches@gcc.gnu.org
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# This file defines procs for determining features supported by the target.
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# Try to compile the code given by CONTENTS into an output file of
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# type TYPE, where TYPE is as for target_compile. Return a list
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# whose first element contains the compiler messages and whose
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# second element is the name of the output file.
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#
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# BASENAME is a prefix to use for source and output files.
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# If ARGS is not empty, its first element is a string that
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# should be added to the command line.
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#
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# Assume by default that CONTENTS is C code.
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# Otherwise, code should contain:
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# "// C++" for c++,
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# "! Fortran" for Fortran code,
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# "/* ObjC", for ObjC
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# "// ObjC++" for ObjC++
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# and "// Go" for Go
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# If the tool is ObjC/ObjC++ then we overide the extension to .m/.mm to
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# allow for ObjC/ObjC++ specific flags.
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proc check_compile {basename type contents args} {
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global tool
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verbose "check_compile tool: $tool for $basename"
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if { [llength $args] > 0 } {
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set options [list "additional_flags=[lindex $args 0]"]
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} else {
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set options ""
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}
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switch -glob -- $contents {
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"*! Fortran*" { set src ${basename}[pid].f90 }
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"*// C++*" { set src ${basename}[pid].cc }
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"*// ObjC++*" { set src ${basename}[pid].mm }
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"*/* ObjC*" { set src ${basename}[pid].m }
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"*// Go*" { set src ${basename}[pid].go }
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default {
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switch -- $tool {
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"objc" { set src ${basename}[pid].m }
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"obj-c++" { set src ${basename}[pid].mm }
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default { set src ${basename}[pid].c }
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}
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}
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}
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set compile_type $type
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switch -glob $type {
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assembly { set output ${basename}[pid].s }
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object { set output ${basename}[pid].o }
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executable { set output ${basename}[pid].exe }
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"rtl-*" {
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set output ${basename}[pid].s
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lappend options "additional_flags=-fdump-$type"
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set compile_type assembly
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}
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}
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set f [open $src "w"]
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puts $f $contents
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close $f
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set lines [${tool}_target_compile $src $output $compile_type "$options"]
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file delete $src
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set scan_output $output
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# Don't try folding this into the switch above; calling "glob" before the
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# file is created won't work.
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if [regexp "rtl-(.*)" $type dummy rtl_type] {
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set scan_output "[glob $src.\[0-9\]\[0-9\]\[0-9\]r.$rtl_type]"
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file delete $output
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}
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return [list $lines $scan_output]
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}
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proc current_target_name { } {
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global target_info
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if [info exists target_info(target,name)] {
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set answer $target_info(target,name)
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} else {
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set answer ""
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}
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return $answer
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}
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# Implement an effective-target check for property PROP by invoking
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# the Tcl command ARGS and seeing if it returns true.
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proc check_cached_effective_target { prop args } {
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global et_cache
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set target [current_target_name]
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if {![info exists et_cache($prop,target)]
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|| $et_cache($prop,target) != $target} {
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verbose "check_cached_effective_target $prop: checking $target" 2
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set et_cache($prop,target) $target
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set et_cache($prop,value) [uplevel eval $args]
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}
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set value $et_cache($prop,value)
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verbose "check_cached_effective_target $prop: returning $value for $target" 2
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return $value
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}
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# Like check_compile, but delete the output file and return true if the
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# compiler printed no messages.
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proc check_no_compiler_messages_nocache {args} {
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set result [eval check_compile $args]
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set lines [lindex $result 0]
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set output [lindex $result 1]
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remote_file build delete $output
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return [string match "" $lines]
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}
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# Like check_no_compiler_messages_nocache, but cache the result.
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# PROP is the property we're checking, and doubles as a prefix for
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# temporary filenames.
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proc check_no_compiler_messages {prop args} {
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return [check_cached_effective_target $prop {
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eval [list check_no_compiler_messages_nocache $prop] $args
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}]
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}
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# Like check_compile, but return true if the compiler printed no
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# messages and if the contents of the output file satisfy PATTERN.
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# If PATTERN has the form "!REGEXP", the contents satisfy it if they
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# don't match regular expression REGEXP, otherwise they satisfy it
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# if they do match regular expression PATTERN. (PATTERN can start
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# with something like "[!]" if the regular expression needs to match
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# "!" as the first character.)
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#
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# Delete the output file before returning. The other arguments are
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# as for check_compile.
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proc check_no_messages_and_pattern_nocache {basename pattern args} {
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global tool
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set result [eval [list check_compile $basename] $args]
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set lines [lindex $result 0]
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set output [lindex $result 1]
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set ok 0
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if { [string match "" $lines] } {
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set chan [open "$output"]
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set invert [regexp {^!(.*)} $pattern dummy pattern]
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set ok [expr { [regexp $pattern [read $chan]] != $invert }]
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close $chan
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}
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remote_file build delete $output
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return $ok
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}
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# Like check_no_messages_and_pattern_nocache, but cache the result.
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# PROP is the property we're checking, and doubles as a prefix for
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# temporary filenames.
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proc check_no_messages_and_pattern {prop pattern args} {
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return [check_cached_effective_target $prop {
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eval [list check_no_messages_and_pattern_nocache $prop $pattern] $args
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}]
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}
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# Try to compile and run an executable from code CONTENTS. Return true
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# if the compiler reports no messages and if execution "passes" in the
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# usual DejaGNU sense. The arguments are as for check_compile, with
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# TYPE implicitly being "executable".
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proc check_runtime_nocache {basename contents args} {
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global tool
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set result [eval [list check_compile $basename executable $contents] $args]
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set lines [lindex $result 0]
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set output [lindex $result 1]
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set ok 0
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if { [string match "" $lines] } {
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# No error messages, everything is OK.
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set result [remote_load target "./$output" "" ""]
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set status [lindex $result 0]
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verbose "check_runtime_nocache $basename: status is <$status>" 2
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if { $status == "pass" } {
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set ok 1
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}
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}
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remote_file build delete $output
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return $ok
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}
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# Like check_runtime_nocache, but cache the result. PROP is the
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# property we're checking, and doubles as a prefix for temporary
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# filenames.
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proc check_runtime {prop args} {
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global tool
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return [check_cached_effective_target $prop {
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eval [list check_runtime_nocache $prop] $args
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}]
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}
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###############################
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# proc check_weak_available { }
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###############################
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# weak symbols are only supported in some configs/object formats
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# this proc returns 1 if they're supported, 0 if they're not, or -1 if unsure
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proc check_weak_available { } {
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global target_cpu
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# All mips targets should support it
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if { [ string first "mips" $target_cpu ] >= 0 } {
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return 1
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}
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# All solaris2 targets should support it
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if { [istarget *-*-solaris2*] } {
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return 1
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}
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# DEC OSF/1/Digital UNIX/Tru64 UNIX supports it
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if { [istarget alpha*-dec-osf*] } {
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return 1
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}
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# Windows targets Cygwin and MingW32 support it
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if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
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return 1
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}
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# HP-UX 10.X doesn't support it
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if { [istarget hppa*-*-hpux10*] } {
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return 0
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}
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# ELF and ECOFF support it. a.out does with gas/gld but may also with
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# other linkers, so we should try it
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set objformat [gcc_target_object_format]
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switch $objformat {
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elf { return 1 }
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ecoff { return 1 }
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a.out { return 1 }
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mach-o { return 1 }
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som { return 1 }
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unknown { return -1 }
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default { return 0 }
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}
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}
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###############################
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# proc check_weak_override_available { }
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###############################
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# Like check_weak_available, but return 0 if weak symbol definitions
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# cannot be overridden.
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proc check_weak_override_available { } {
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if { [istarget *-*-mingw*] } {
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return 0
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}
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return [check_weak_available]
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}
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###############################
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# proc check_visibility_available { what_kind }
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###############################
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# The visibility attribute is only support in some object formats
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# This proc returns 1 if it is supported, 0 if not.
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# The argument is the kind of visibility, default/protected/hidden/internal.
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proc check_visibility_available { what_kind } {
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if [string match "" $what_kind] { set what_kind "hidden" }
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return [check_no_compiler_messages visibility_available_$what_kind object "
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void f() __attribute__((visibility(\"$what_kind\")));
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void f() {}
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"]
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}
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###############################
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# proc check_alias_available { }
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###############################
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# Determine if the target toolchain supports the alias attribute.
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# Returns 2 if the target supports aliases. Returns 1 if the target
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# only supports weak aliased. Returns 0 if the target does not
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# support aliases at all. Returns -1 if support for aliases could not
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# be determined.
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proc check_alias_available { } {
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global alias_available_saved
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global tool
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if [info exists alias_available_saved] {
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verbose "check_alias_available returning saved $alias_available_saved" 2
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} else {
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set src alias[pid].c
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set obj alias[pid].o
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verbose "check_alias_available compiling testfile $src" 2
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set f [open $src "w"]
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# Compile a small test program. The definition of "g" is
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# necessary to keep the Solaris assembler from complaining
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# about the program.
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puts $f "#ifdef __cplusplus\nextern \"C\"\n#endif\n"
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puts $f "void g() {} void f() __attribute__((alias(\"g\")));"
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close $f
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set lines [${tool}_target_compile $src $obj object ""]
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file delete $src
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remote_file build delete $obj
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333 |
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if [string match "" $lines] then {
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# No error messages, everything is OK.
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set alias_available_saved 2
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} else {
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337 |
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if [regexp "alias definitions not supported" $lines] {
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verbose "check_alias_available target does not support aliases" 2
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339 |
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340 |
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set objformat [gcc_target_object_format]
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if { $objformat == "elf" } {
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verbose "check_alias_available but target uses ELF format, so it ought to" 2
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set alias_available_saved -1
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} else {
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set alias_available_saved 0
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}
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348 |
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} else {
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349 |
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if [regexp "only weak aliases are supported" $lines] {
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verbose "check_alias_available target supports only weak aliases" 2
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set alias_available_saved 1
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} else {
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set alias_available_saved -1
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}
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}
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}
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verbose "check_alias_available returning $alias_available_saved" 2
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}
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360 |
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361 |
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return $alias_available_saved
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}
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363 |
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|
|
# Returns 1 if the target toolchain supports ifunc, 0 otherwise.
|
365 |
|
|
|
366 |
|
|
proc check_ifunc_available { } {
|
367 |
|
|
return [check_no_compiler_messages ifunc_available object {
|
368 |
|
|
#ifdef __cplusplus
|
369 |
|
|
extern "C"
|
370 |
|
|
#endif
|
371 |
|
|
void g() {}
|
372 |
|
|
void f() __attribute__((ifunc("g")));
|
373 |
|
|
}]
|
374 |
|
|
}
|
375 |
|
|
|
376 |
|
|
# Returns true if --gc-sections is supported on the target.
|
377 |
|
|
|
378 |
|
|
proc check_gc_sections_available { } {
|
379 |
|
|
global gc_sections_available_saved
|
380 |
|
|
global tool
|
381 |
|
|
|
382 |
|
|
if {![info exists gc_sections_available_saved]} {
|
383 |
|
|
# Some targets don't support gc-sections despite whatever's
|
384 |
|
|
# advertised by ld's options.
|
385 |
|
|
if { [istarget alpha*-*-*]
|
386 |
|
|
|| [istarget ia64-*-*] } {
|
387 |
|
|
set gc_sections_available_saved 0
|
388 |
|
|
return 0
|
389 |
|
|
}
|
390 |
|
|
|
391 |
|
|
# elf2flt uses -q (--emit-relocs), which is incompatible with
|
392 |
|
|
# --gc-sections.
|
393 |
|
|
if { [board_info target exists ldflags]
|
394 |
|
|
&& [regexp " -elf2flt\[ =\]" " [board_info target ldflags] "] } {
|
395 |
|
|
set gc_sections_available_saved 0
|
396 |
|
|
return 0
|
397 |
|
|
}
|
398 |
|
|
|
399 |
|
|
# VxWorks kernel modules are relocatable objects linked with -r,
|
400 |
|
|
# while RTP executables are linked with -q (--emit-relocs).
|
401 |
|
|
# Both of these options are incompatible with --gc-sections.
|
402 |
|
|
if { [istarget *-*-vxworks*] } {
|
403 |
|
|
set gc_sections_available_saved 0
|
404 |
|
|
return 0
|
405 |
|
|
}
|
406 |
|
|
|
407 |
|
|
# Check if the ld used by gcc supports --gc-sections.
|
408 |
|
|
set gcc_spec [${tool}_target_compile "-dumpspecs" "" "none" ""]
|
409 |
|
|
regsub ".*\n\\*linker:\[ \t\]*\n(\[^ \t\n\]*).*" "$gcc_spec" {\1} linker
|
410 |
|
|
set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=$linker" "" "none" ""] 0]
|
411 |
|
|
set ld_output [remote_exec host "$gcc_ld" "--help"]
|
412 |
|
|
if { [ string first "--gc-sections" $ld_output ] >= 0 } {
|
413 |
|
|
set gc_sections_available_saved 1
|
414 |
|
|
} else {
|
415 |
|
|
set gc_sections_available_saved 0
|
416 |
|
|
}
|
417 |
|
|
}
|
418 |
|
|
return $gc_sections_available_saved
|
419 |
|
|
}
|
420 |
|
|
|
421 |
|
|
# Return 1 if according to target_info struct and explicit target list
|
422 |
|
|
# target is supposed to support trampolines.
|
423 |
|
|
|
424 |
|
|
proc check_effective_target_trampolines { } {
|
425 |
|
|
if [target_info exists no_trampolines] {
|
426 |
|
|
return 0
|
427 |
|
|
}
|
428 |
|
|
if { [istarget avr-*-*]
|
429 |
|
|
|| [istarget hppa2.0w-hp-hpux11.23]
|
430 |
|
|
|| [istarget hppa64-hp-hpux11.23] } {
|
431 |
|
|
return 0;
|
432 |
|
|
}
|
433 |
|
|
return 1
|
434 |
|
|
}
|
435 |
|
|
|
436 |
|
|
# Return 1 if according to target_info struct and explicit target list
|
437 |
|
|
# target is supposed to keep null pointer checks. This could be due to
|
438 |
|
|
# use of option fno-delete-null-pointer-checks or hardwired in target.
|
439 |
|
|
|
440 |
|
|
proc check_effective_target_keeps_null_pointer_checks { } {
|
441 |
|
|
if [target_info exists keeps_null_pointer_checks] {
|
442 |
|
|
return 1
|
443 |
|
|
}
|
444 |
|
|
if { [istarget avr-*-*] } {
|
445 |
|
|
return 1;
|
446 |
|
|
}
|
447 |
|
|
return 0
|
448 |
|
|
}
|
449 |
|
|
|
450 |
|
|
# Return true if profiling is supported on the target.
|
451 |
|
|
|
452 |
|
|
proc check_profiling_available { test_what } {
|
453 |
|
|
global profiling_available_saved
|
454 |
|
|
|
455 |
|
|
verbose "Profiling argument is <$test_what>" 1
|
456 |
|
|
|
457 |
|
|
# These conditions depend on the argument so examine them before
|
458 |
|
|
# looking at the cache variable.
|
459 |
|
|
|
460 |
|
|
# Tree profiling requires TLS runtime support.
|
461 |
|
|
if { $test_what == "-fprofile-generate" } {
|
462 |
|
|
if { ![check_effective_target_tls_runtime] } {
|
463 |
|
|
return 0
|
464 |
|
|
}
|
465 |
|
|
}
|
466 |
|
|
|
467 |
|
|
# Support for -p on solaris2 relies on mcrt1.o which comes with the
|
468 |
|
|
# vendor compiler. We cannot reliably predict the directory where the
|
469 |
|
|
# vendor compiler (and thus mcrt1.o) is installed so we can't
|
470 |
|
|
# necessarily find mcrt1.o even if we have it.
|
471 |
|
|
if { [istarget *-*-solaris2*] && $test_what == "-p" } {
|
472 |
|
|
return 0
|
473 |
|
|
}
|
474 |
|
|
|
475 |
|
|
# Support for -p on irix relies on libprof1.a which doesn't appear to
|
476 |
|
|
# exist on any irix6 system currently posting testsuite results.
|
477 |
|
|
# Support for -pg on irix relies on gcrt1.o which doesn't exist yet.
|
478 |
|
|
# See: http://gcc.gnu.org/ml/gcc/2002-10/msg00169.html
|
479 |
|
|
if { [istarget mips*-*-irix*]
|
480 |
|
|
&& ($test_what == "-p" || $test_what == "-pg") } {
|
481 |
|
|
return 0
|
482 |
|
|
}
|
483 |
|
|
|
484 |
|
|
# We don't yet support profiling for MIPS16.
|
485 |
|
|
if { [istarget mips*-*-*]
|
486 |
|
|
&& ![check_effective_target_nomips16]
|
487 |
|
|
&& ($test_what == "-p" || $test_what == "-pg") } {
|
488 |
|
|
return 0
|
489 |
|
|
}
|
490 |
|
|
|
491 |
|
|
# MinGW does not support -p.
|
492 |
|
|
if { [istarget *-*-mingw*] && $test_what == "-p" } {
|
493 |
|
|
return 0
|
494 |
|
|
}
|
495 |
|
|
|
496 |
|
|
# cygwin does not support -p.
|
497 |
|
|
if { [istarget *-*-cygwin*] && $test_what == "-p" } {
|
498 |
|
|
return 0
|
499 |
|
|
}
|
500 |
|
|
|
501 |
|
|
# uClibc does not have gcrt1.o.
|
502 |
|
|
if { [check_effective_target_uclibc]
|
503 |
|
|
&& ($test_what == "-p" || $test_what == "-pg") } {
|
504 |
|
|
return 0
|
505 |
|
|
}
|
506 |
|
|
|
507 |
|
|
# Now examine the cache variable.
|
508 |
|
|
if {![info exists profiling_available_saved]} {
|
509 |
|
|
# Some targets don't have any implementation of __bb_init_func or are
|
510 |
|
|
# missing other needed machinery.
|
511 |
|
|
if { [istarget am3*-*-linux*]
|
512 |
|
|
|| [istarget arm*-*-eabi*]
|
513 |
|
|
|| [istarget arm*-*-elf]
|
514 |
|
|
|| [istarget arm*-*-symbianelf*]
|
515 |
|
|
|| [istarget avr-*-*]
|
516 |
|
|
|| [istarget bfin-*-*]
|
517 |
|
|
|| [istarget cris-*-*]
|
518 |
|
|
|| [istarget crisv32-*-*]
|
519 |
|
|
|| [istarget fido-*-elf]
|
520 |
|
|
|| [istarget h8300-*-*]
|
521 |
|
|
|| [istarget lm32-*-*]
|
522 |
|
|
|| [istarget m32c-*-elf]
|
523 |
|
|
|| [istarget m68k-*-elf]
|
524 |
|
|
|| [istarget m68k-*-uclinux*]
|
525 |
|
|
|| [istarget mep-*-elf]
|
526 |
|
|
|| [istarget mips*-*-elf*]
|
527 |
|
|
|| [istarget mmix-*-*]
|
528 |
|
|
|| [istarget mn10300-*-elf*]
|
529 |
|
|
|| [istarget moxie-*-elf*]
|
530 |
|
|
|| [istarget picochip-*-*]
|
531 |
|
|
|| [istarget powerpc-*-eabi*]
|
532 |
|
|
|| [istarget powerpc-*-elf]
|
533 |
|
|
|| [istarget rx-*-*]
|
534 |
|
|
|| [istarget tic6x-*-elf]
|
535 |
|
|
|| [istarget xstormy16-*]
|
536 |
|
|
|| [istarget xtensa*-*-elf]
|
537 |
|
|
|| [istarget *-*-rtems*]
|
538 |
|
|
|| [istarget *-*-vxworks*] } {
|
539 |
|
|
set profiling_available_saved 0
|
540 |
|
|
} else {
|
541 |
|
|
set profiling_available_saved 1
|
542 |
|
|
}
|
543 |
|
|
}
|
544 |
|
|
|
545 |
|
|
return $profiling_available_saved
|
546 |
|
|
}
|
547 |
|
|
|
548 |
|
|
# Check to see if a target is "freestanding". This is as per the definition
|
549 |
|
|
# in Section 4 of C99 standard. Effectively, it is a target which supports no
|
550 |
|
|
# extra headers or libraries other than what is considered essential.
|
551 |
|
|
proc check_effective_target_freestanding { } {
|
552 |
|
|
if { [istarget picochip-*-*] } then {
|
553 |
|
|
return 1
|
554 |
|
|
} else {
|
555 |
|
|
return 0
|
556 |
|
|
}
|
557 |
|
|
}
|
558 |
|
|
|
559 |
|
|
# Return 1 if target has packed layout of structure members by
|
560 |
|
|
# default, 0 otherwise. Note that this is slightly different than
|
561 |
|
|
# whether the target has "natural alignment": both attributes may be
|
562 |
|
|
# false.
|
563 |
|
|
|
564 |
|
|
proc check_effective_target_default_packed { } {
|
565 |
|
|
return [check_no_compiler_messages default_packed assembly {
|
566 |
|
|
struct x { char a; long b; } c;
|
567 |
|
|
int s[sizeof (c) == sizeof (char) + sizeof (long) ? 1 : -1];
|
568 |
|
|
}]
|
569 |
|
|
}
|
570 |
|
|
|
571 |
|
|
# Return 1 if target has PCC_BITFIELD_TYPE_MATTERS defined. See
|
572 |
|
|
# documentation, where the test also comes from.
|
573 |
|
|
|
574 |
|
|
proc check_effective_target_pcc_bitfield_type_matters { } {
|
575 |
|
|
# PCC_BITFIELD_TYPE_MATTERS isn't just about unnamed or empty
|
576 |
|
|
# bitfields, but let's stick to the example code from the docs.
|
577 |
|
|
return [check_no_compiler_messages pcc_bitfield_type_matters assembly {
|
578 |
|
|
struct foo1 { char x; char :0; char y; };
|
579 |
|
|
struct foo2 { char x; int :0; char y; };
|
580 |
|
|
int s[sizeof (struct foo1) != sizeof (struct foo2) ? 1 : -1];
|
581 |
|
|
}]
|
582 |
|
|
}
|
583 |
|
|
|
584 |
|
|
# Add to FLAGS all the target-specific flags needed to use thread-local storage.
|
585 |
|
|
|
586 |
|
|
proc add_options_for_tls { flags } {
|
587 |
|
|
# Tru64 UNIX uses emutls, which relies on a couple of pthread functions
|
588 |
|
|
# which only live in libpthread, so always pass -pthread for TLS.
|
589 |
|
|
if { [istarget alpha*-dec-osf*] } {
|
590 |
|
|
return "$flags -pthread"
|
591 |
|
|
}
|
592 |
|
|
# On Solaris 8 and 9, __tls_get_addr/___tls_get_addr only lives in
|
593 |
|
|
# libthread, so always pass -pthread for native TLS.
|
594 |
|
|
# Need to duplicate native TLS check from
|
595 |
|
|
# check_effective_target_tls_native to avoid recursion.
|
596 |
|
|
if { [istarget *-*-solaris2.\[89\]*] &&
|
597 |
|
|
[check_no_messages_and_pattern tls_native "!emutls" assembly {
|
598 |
|
|
__thread int i;
|
599 |
|
|
int f (void) { return i; }
|
600 |
|
|
void g (int j) { i = j; }
|
601 |
|
|
}] } {
|
602 |
|
|
return "$flags -pthread"
|
603 |
|
|
}
|
604 |
|
|
return $flags
|
605 |
|
|
}
|
606 |
|
|
|
607 |
|
|
# Return 1 if thread local storage (TLS) is supported, 0 otherwise.
|
608 |
|
|
|
609 |
|
|
proc check_effective_target_tls {} {
|
610 |
|
|
return [check_no_compiler_messages tls assembly {
|
611 |
|
|
__thread int i;
|
612 |
|
|
int f (void) { return i; }
|
613 |
|
|
void g (int j) { i = j; }
|
614 |
|
|
}]
|
615 |
|
|
}
|
616 |
|
|
|
617 |
|
|
# Return 1 if *native* thread local storage (TLS) is supported, 0 otherwise.
|
618 |
|
|
|
619 |
|
|
proc check_effective_target_tls_native {} {
|
620 |
|
|
# VxWorks uses emulated TLS machinery, but with non-standard helper
|
621 |
|
|
# functions, so we fail to automatically detect it.
|
622 |
|
|
if { [istarget *-*-vxworks*] } {
|
623 |
|
|
return 0
|
624 |
|
|
}
|
625 |
|
|
|
626 |
|
|
return [check_no_messages_and_pattern tls_native "!emutls" assembly {
|
627 |
|
|
__thread int i;
|
628 |
|
|
int f (void) { return i; }
|
629 |
|
|
void g (int j) { i = j; }
|
630 |
|
|
}]
|
631 |
|
|
}
|
632 |
|
|
|
633 |
|
|
# Return 1 if *emulated* thread local storage (TLS) is supported, 0 otherwise.
|
634 |
|
|
|
635 |
|
|
proc check_effective_target_tls_emulated {} {
|
636 |
|
|
# VxWorks uses emulated TLS machinery, but with non-standard helper
|
637 |
|
|
# functions, so we fail to automatically detect it.
|
638 |
|
|
if { [istarget *-*-vxworks*] } {
|
639 |
|
|
return 1
|
640 |
|
|
}
|
641 |
|
|
|
642 |
|
|
return [check_no_messages_and_pattern tls_emulated "emutls" assembly {
|
643 |
|
|
__thread int i;
|
644 |
|
|
int f (void) { return i; }
|
645 |
|
|
void g (int j) { i = j; }
|
646 |
|
|
}]
|
647 |
|
|
}
|
648 |
|
|
|
649 |
|
|
# Return 1 if TLS executables can run correctly, 0 otherwise.
|
650 |
|
|
|
651 |
|
|
proc check_effective_target_tls_runtime {} {
|
652 |
|
|
return [check_runtime tls_runtime {
|
653 |
|
|
__thread int thr = 0;
|
654 |
|
|
int main (void) { return thr; }
|
655 |
|
|
} [add_options_for_tls ""]]
|
656 |
|
|
}
|
657 |
|
|
|
658 |
|
|
# Return 1 if atomic compare-and-swap is supported on 'int'
|
659 |
|
|
|
660 |
|
|
proc check_effective_target_cas_char {} {
|
661 |
|
|
return [check_no_compiler_messages cas_char assembly {
|
662 |
|
|
#ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
|
663 |
|
|
#error unsupported
|
664 |
|
|
#endif
|
665 |
|
|
} ""]
|
666 |
|
|
}
|
667 |
|
|
|
668 |
|
|
proc check_effective_target_cas_int {} {
|
669 |
|
|
return [check_no_compiler_messages cas_int assembly {
|
670 |
|
|
#if __INT_MAX__ == 0x7fff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
|
671 |
|
|
/* ok */
|
672 |
|
|
#elif __INT_MAX__ == 0x7fffffff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
|
673 |
|
|
/* ok */
|
674 |
|
|
#else
|
675 |
|
|
#error unsupported
|
676 |
|
|
#endif
|
677 |
|
|
} ""]
|
678 |
|
|
}
|
679 |
|
|
|
680 |
|
|
# Return 1 if -ffunction-sections is supported, 0 otherwise.
|
681 |
|
|
|
682 |
|
|
proc check_effective_target_function_sections {} {
|
683 |
|
|
# Darwin has its own scheme and silently accepts -ffunction-sections.
|
684 |
|
|
if { [istarget *-*-darwin*] } {
|
685 |
|
|
return 0
|
686 |
|
|
}
|
687 |
|
|
|
688 |
|
|
return [check_no_compiler_messages functionsections assembly {
|
689 |
|
|
void foo (void) { }
|
690 |
|
|
} "-ffunction-sections"]
|
691 |
|
|
}
|
692 |
|
|
|
693 |
|
|
# Return 1 if instruction scheduling is available, 0 otherwise.
|
694 |
|
|
|
695 |
|
|
proc check_effective_target_scheduling {} {
|
696 |
|
|
return [check_no_compiler_messages scheduling object {
|
697 |
|
|
void foo (void) { }
|
698 |
|
|
} "-fschedule-insns"]
|
699 |
|
|
}
|
700 |
|
|
|
701 |
|
|
# Return 1 if compilation with -fgraphite is error-free for trivial
|
702 |
|
|
# code, 0 otherwise.
|
703 |
|
|
|
704 |
|
|
proc check_effective_target_fgraphite {} {
|
705 |
|
|
return [check_no_compiler_messages fgraphite object {
|
706 |
|
|
void foo (void) { }
|
707 |
|
|
} "-O1 -fgraphite"]
|
708 |
|
|
}
|
709 |
|
|
|
710 |
|
|
# Return 1 if compilation with -fopenmp is error-free for trivial
|
711 |
|
|
# code, 0 otherwise.
|
712 |
|
|
|
713 |
|
|
proc check_effective_target_fopenmp {} {
|
714 |
|
|
return [check_no_compiler_messages fopenmp object {
|
715 |
|
|
void foo (void) { }
|
716 |
|
|
} "-fopenmp"]
|
717 |
|
|
}
|
718 |
|
|
|
719 |
|
|
# Return 1 if compilation with -fgnu-tm is error-free for trivial
|
720 |
|
|
# code, 0 otherwise.
|
721 |
|
|
|
722 |
|
|
proc check_effective_target_fgnu_tm {} {
|
723 |
|
|
return [check_no_compiler_messages fgnu_tm object {
|
724 |
|
|
void foo (void) { }
|
725 |
|
|
} "-fgnu-tm"]
|
726 |
|
|
}
|
727 |
|
|
|
728 |
|
|
# Return 1 if the target supports mmap, 0 otherwise.
|
729 |
|
|
|
730 |
|
|
proc check_effective_target_mmap {} {
|
731 |
|
|
return [check_function_available "mmap"]
|
732 |
|
|
}
|
733 |
|
|
|
734 |
|
|
# Return 1 if compilation with -pthread is error-free for trivial
|
735 |
|
|
# code, 0 otherwise.
|
736 |
|
|
|
737 |
|
|
proc check_effective_target_pthread {} {
|
738 |
|
|
return [check_no_compiler_messages pthread object {
|
739 |
|
|
void foo (void) { }
|
740 |
|
|
} "-pthread"]
|
741 |
|
|
}
|
742 |
|
|
|
743 |
|
|
# Return 1 if compilation with -mpe-aligned-commons is error-free
|
744 |
|
|
# for trivial code, 0 otherwise.
|
745 |
|
|
|
746 |
|
|
proc check_effective_target_pe_aligned_commons {} {
|
747 |
|
|
if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
|
748 |
|
|
return [check_no_compiler_messages pe_aligned_commons object {
|
749 |
|
|
int foo;
|
750 |
|
|
} "-mpe-aligned-commons"]
|
751 |
|
|
}
|
752 |
|
|
return 0
|
753 |
|
|
}
|
754 |
|
|
|
755 |
|
|
# Return 1 if the target supports -static
|
756 |
|
|
proc check_effective_target_static {} {
|
757 |
|
|
return [check_no_compiler_messages static executable {
|
758 |
|
|
int main (void) { return 0; }
|
759 |
|
|
} "-static"]
|
760 |
|
|
}
|
761 |
|
|
|
762 |
|
|
# Return 1 if the target supports -fstack-protector
|
763 |
|
|
proc check_effective_target_fstack_protector {} {
|
764 |
|
|
return [check_runtime fstack_protector {
|
765 |
|
|
int main (void) { return 0; }
|
766 |
|
|
} "-fstack-protector"]
|
767 |
|
|
}
|
768 |
|
|
|
769 |
|
|
# Return 1 if compilation with -freorder-blocks-and-partition is error-free
|
770 |
|
|
# for trivial code, 0 otherwise.
|
771 |
|
|
|
772 |
|
|
proc check_effective_target_freorder {} {
|
773 |
|
|
return [check_no_compiler_messages freorder object {
|
774 |
|
|
void foo (void) { }
|
775 |
|
|
} "-freorder-blocks-and-partition"]
|
776 |
|
|
}
|
777 |
|
|
|
778 |
|
|
# Return 1 if -fpic and -fPIC are supported, as in no warnings or errors
|
779 |
|
|
# emitted, 0 otherwise. Whether a shared library can actually be built is
|
780 |
|
|
# out of scope for this test.
|
781 |
|
|
|
782 |
|
|
proc check_effective_target_fpic { } {
|
783 |
|
|
# Note that M68K has a multilib that supports -fpic but not
|
784 |
|
|
# -fPIC, so we need to check both. We test with a program that
|
785 |
|
|
# requires GOT references.
|
786 |
|
|
foreach arg {fpic fPIC} {
|
787 |
|
|
if [check_no_compiler_messages $arg object {
|
788 |
|
|
extern int foo (void); extern int bar;
|
789 |
|
|
int baz (void) { return foo () + bar; }
|
790 |
|
|
} "-$arg"] {
|
791 |
|
|
return 1
|
792 |
|
|
}
|
793 |
|
|
}
|
794 |
|
|
return 0
|
795 |
|
|
}
|
796 |
|
|
|
797 |
|
|
# Return 1 if -pie, -fpie and -fPIE are supported, 0 otherwise.
|
798 |
|
|
|
799 |
|
|
proc check_effective_target_pie { } {
|
800 |
|
|
if { [istarget *-*-darwin\[912\]*]
|
801 |
|
|
|| [istarget *-*-linux*] } {
|
802 |
|
|
return 1;
|
803 |
|
|
}
|
804 |
|
|
return 0
|
805 |
|
|
}
|
806 |
|
|
|
807 |
|
|
# Return true if the target supports -mpaired-single (as used on MIPS).
|
808 |
|
|
|
809 |
|
|
proc check_effective_target_mpaired_single { } {
|
810 |
|
|
return [check_no_compiler_messages mpaired_single object {
|
811 |
|
|
void foo (void) { }
|
812 |
|
|
} "-mpaired-single"]
|
813 |
|
|
}
|
814 |
|
|
|
815 |
|
|
# Return true if the target has access to FPU instructions.
|
816 |
|
|
|
817 |
|
|
proc check_effective_target_hard_float { } {
|
818 |
|
|
if { [istarget mips*-*-*] } {
|
819 |
|
|
return [check_no_compiler_messages hard_float assembly {
|
820 |
|
|
#if (defined __mips_soft_float || defined __mips16)
|
821 |
|
|
#error FOO
|
822 |
|
|
#endif
|
823 |
|
|
}]
|
824 |
|
|
}
|
825 |
|
|
|
826 |
|
|
# This proc is actually checking the availabilty of FPU
|
827 |
|
|
# support for doubles, so on the RX we must fail if the
|
828 |
|
|
# 64-bit double multilib has been selected.
|
829 |
|
|
if { [istarget rx-*-*] } {
|
830 |
|
|
return 0
|
831 |
|
|
# return [check_no_compiler_messages hard_float assembly {
|
832 |
|
|
#if defined __RX_64_BIT_DOUBLES__
|
833 |
|
|
#error FOO
|
834 |
|
|
#endif
|
835 |
|
|
# }]
|
836 |
|
|
}
|
837 |
|
|
|
838 |
|
|
# The generic test equates hard_float with "no call for adding doubles".
|
839 |
|
|
return [check_no_messages_and_pattern hard_float "!\\(call" rtl-expand {
|
840 |
|
|
double a (double b, double c) { return b + c; }
|
841 |
|
|
}]
|
842 |
|
|
}
|
843 |
|
|
|
844 |
|
|
# Return true if the target is a 64-bit MIPS target.
|
845 |
|
|
|
846 |
|
|
proc check_effective_target_mips64 { } {
|
847 |
|
|
return [check_no_compiler_messages mips64 assembly {
|
848 |
|
|
#ifndef __mips64
|
849 |
|
|
#error FOO
|
850 |
|
|
#endif
|
851 |
|
|
}]
|
852 |
|
|
}
|
853 |
|
|
|
854 |
|
|
# Return true if the target is a MIPS target that does not produce
|
855 |
|
|
# MIPS16 code.
|
856 |
|
|
|
857 |
|
|
proc check_effective_target_nomips16 { } {
|
858 |
|
|
return [check_no_compiler_messages nomips16 object {
|
859 |
|
|
#ifndef __mips
|
860 |
|
|
#error FOO
|
861 |
|
|
#else
|
862 |
|
|
/* A cheap way of testing for -mflip-mips16. */
|
863 |
|
|
void foo (void) { asm ("addiu $20,$20,1"); }
|
864 |
|
|
void bar (void) { asm ("addiu $20,$20,1"); }
|
865 |
|
|
#endif
|
866 |
|
|
}]
|
867 |
|
|
}
|
868 |
|
|
|
869 |
|
|
# Add the options needed for MIPS16 function attributes. At the moment,
|
870 |
|
|
# we don't support MIPS16 PIC.
|
871 |
|
|
|
872 |
|
|
proc add_options_for_mips16_attribute { flags } {
|
873 |
|
|
return "$flags -mno-abicalls -fno-pic -DMIPS16=__attribute__((mips16))"
|
874 |
|
|
}
|
875 |
|
|
|
876 |
|
|
# Return true if we can force a mode that allows MIPS16 code generation.
|
877 |
|
|
# We don't support MIPS16 PIC, and only support MIPS16 -mhard-float
|
878 |
|
|
# for o32 and o64.
|
879 |
|
|
|
880 |
|
|
proc check_effective_target_mips16_attribute { } {
|
881 |
|
|
return [check_no_compiler_messages mips16_attribute assembly {
|
882 |
|
|
#ifdef PIC
|
883 |
|
|
#error FOO
|
884 |
|
|
#endif
|
885 |
|
|
#if defined __mips_hard_float \
|
886 |
|
|
&& (!defined _ABIO32 || _MIPS_SIM != _ABIO32) \
|
887 |
|
|
&& (!defined _ABIO64 || _MIPS_SIM != _ABIO64)
|
888 |
|
|
#error FOO
|
889 |
|
|
#endif
|
890 |
|
|
} [add_options_for_mips16_attribute ""]]
|
891 |
|
|
}
|
892 |
|
|
|
893 |
|
|
# Return 1 if the target supports long double larger than double when
|
894 |
|
|
# using the new ABI, 0 otherwise.
|
895 |
|
|
|
896 |
|
|
proc check_effective_target_mips_newabi_large_long_double { } {
|
897 |
|
|
return [check_no_compiler_messages mips_newabi_large_long_double object {
|
898 |
|
|
int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
|
899 |
|
|
} "-mabi=64"]
|
900 |
|
|
}
|
901 |
|
|
|
902 |
|
|
# Return true if the target is a MIPS target that has access
|
903 |
|
|
# to the LL and SC instructions.
|
904 |
|
|
|
905 |
|
|
proc check_effective_target_mips_llsc { } {
|
906 |
|
|
if { ![istarget mips*-*-*] } {
|
907 |
|
|
return 0
|
908 |
|
|
}
|
909 |
|
|
# Assume that these instructions are always implemented for
|
910 |
|
|
# non-elf* targets, via emulation if necessary.
|
911 |
|
|
if { ![istarget *-*-elf*] } {
|
912 |
|
|
return 1
|
913 |
|
|
}
|
914 |
|
|
# Otherwise assume LL/SC support for everything but MIPS I.
|
915 |
|
|
return [check_no_compiler_messages mips_llsc assembly {
|
916 |
|
|
#if __mips == 1
|
917 |
|
|
#error FOO
|
918 |
|
|
#endif
|
919 |
|
|
}]
|
920 |
|
|
}
|
921 |
|
|
|
922 |
|
|
# Return true if the target is a MIPS target that uses in-place relocations.
|
923 |
|
|
|
924 |
|
|
proc check_effective_target_mips_rel { } {
|
925 |
|
|
if { ![istarget mips*-*-*] } {
|
926 |
|
|
return 0
|
927 |
|
|
}
|
928 |
|
|
return [check_no_compiler_messages mips_rel object {
|
929 |
|
|
#if (defined _ABIN32 && _MIPS_SIM == _ABIN32) \
|
930 |
|
|
|| (defined _ABI64 && _MIPS_SIM == _ABI64)
|
931 |
|
|
#error FOO
|
932 |
|
|
#endif
|
933 |
|
|
}]
|
934 |
|
|
}
|
935 |
|
|
|
936 |
|
|
# Return true if the target is a MIPS target that uses the EABI.
|
937 |
|
|
|
938 |
|
|
proc check_effective_target_mips_eabi { } {
|
939 |
|
|
if { ![istarget mips*-*-*] } {
|
940 |
|
|
return 0
|
941 |
|
|
}
|
942 |
|
|
return [check_no_compiler_messages mips_eabi object {
|
943 |
|
|
#ifndef __mips_eabi
|
944 |
|
|
#error FOO
|
945 |
|
|
#endif
|
946 |
|
|
}]
|
947 |
|
|
}
|
948 |
|
|
|
949 |
|
|
# Return 1 if the current multilib does not generate PIC by default.
|
950 |
|
|
|
951 |
|
|
proc check_effective_target_nonpic { } {
|
952 |
|
|
return [check_no_compiler_messages nonpic assembly {
|
953 |
|
|
#if __PIC__
|
954 |
|
|
#error FOO
|
955 |
|
|
#endif
|
956 |
|
|
}]
|
957 |
|
|
}
|
958 |
|
|
|
959 |
|
|
# Return 1 if the target does not use a status wrapper.
|
960 |
|
|
|
961 |
|
|
proc check_effective_target_unwrapped { } {
|
962 |
|
|
if { [target_info needs_status_wrapper] != "" \
|
963 |
|
|
&& [target_info needs_status_wrapper] != "0" } {
|
964 |
|
|
return 0
|
965 |
|
|
}
|
966 |
|
|
return 1
|
967 |
|
|
}
|
968 |
|
|
|
969 |
|
|
# Return true if iconv is supported on the target. In particular IBM1047.
|
970 |
|
|
|
971 |
|
|
proc check_iconv_available { test_what } {
|
972 |
|
|
global libiconv
|
973 |
|
|
|
974 |
|
|
# If the tool configuration file has not set libiconv, try "-liconv"
|
975 |
|
|
if { ![info exists libiconv] } {
|
976 |
|
|
set libiconv "-liconv"
|
977 |
|
|
}
|
978 |
|
|
set test_what [lindex $test_what 1]
|
979 |
|
|
return [check_runtime_nocache $test_what [subst {
|
980 |
|
|
#include
|
981 |
|
|
int main (void)
|
982 |
|
|
{
|
983 |
|
|
iconv_t cd;
|
984 |
|
|
|
985 |
|
|
cd = iconv_open ("$test_what", "UTF-8");
|
986 |
|
|
if (cd == (iconv_t) -1)
|
987 |
|
|
return 1;
|
988 |
|
|
return 0;
|
989 |
|
|
}
|
990 |
|
|
}] $libiconv]
|
991 |
|
|
}
|
992 |
|
|
|
993 |
|
|
# Return 1 if an ASCII locale is supported on this host, 0 otherwise.
|
994 |
|
|
|
995 |
|
|
proc check_ascii_locale_available { } {
|
996 |
|
|
if { ([ishost alpha*-dec-osf*] || [ishost mips-sgi-irix*]) } {
|
997 |
|
|
# Neither Tru64 UNIX nor IRIX support an ASCII locale.
|
998 |
|
|
return 0
|
999 |
|
|
} else {
|
1000 |
|
|
return 1
|
1001 |
|
|
}
|
1002 |
|
|
}
|
1003 |
|
|
|
1004 |
|
|
# Return true if named sections are supported on this target.
|
1005 |
|
|
|
1006 |
|
|
proc check_named_sections_available { } {
|
1007 |
|
|
return [check_no_compiler_messages named_sections assembly {
|
1008 |
|
|
int __attribute__ ((section("whatever"))) foo;
|
1009 |
|
|
}]
|
1010 |
|
|
}
|
1011 |
|
|
|
1012 |
|
|
# Return 1 if the target supports Fortran real kinds larger than real(8),
|
1013 |
|
|
# 0 otherwise.
|
1014 |
|
|
#
|
1015 |
|
|
# When the target name changes, replace the cached result.
|
1016 |
|
|
|
1017 |
|
|
proc check_effective_target_fortran_large_real { } {
|
1018 |
|
|
return [check_no_compiler_messages fortran_large_real executable {
|
1019 |
|
|
! Fortran
|
1020 |
|
|
integer,parameter :: k = selected_real_kind (precision (0.0_8) + 1)
|
1021 |
|
|
real(kind=k) :: x
|
1022 |
|
|
x = cos (x)
|
1023 |
|
|
end
|
1024 |
|
|
}]
|
1025 |
|
|
}
|
1026 |
|
|
|
1027 |
|
|
# Return 1 if the target supports Fortran real kind real(16),
|
1028 |
|
|
# 0 otherwise. Contrary to check_effective_target_fortran_large_real
|
1029 |
|
|
# this checks for Real(16) only; the other returned real(10) if
|
1030 |
|
|
# both real(10) and real(16) are available.
|
1031 |
|
|
#
|
1032 |
|
|
# When the target name changes, replace the cached result.
|
1033 |
|
|
|
1034 |
|
|
proc check_effective_target_fortran_real_16 { } {
|
1035 |
|
|
return [check_no_compiler_messages fortran_real_16 executable {
|
1036 |
|
|
! Fortran
|
1037 |
|
|
real(kind=16) :: x
|
1038 |
|
|
x = cos (x)
|
1039 |
|
|
end
|
1040 |
|
|
}]
|
1041 |
|
|
}
|
1042 |
|
|
|
1043 |
|
|
|
1044 |
|
|
# Return 1 if the target supports SQRT for the largest floating-point
|
1045 |
|
|
# type. (Some targets lack the libm support for this FP type.)
|
1046 |
|
|
# On most targets, this check effectively checks either whether sqrtl is
|
1047 |
|
|
# available or on __float128 systems whether libquadmath is installed,
|
1048 |
|
|
# which provides sqrtq.
|
1049 |
|
|
#
|
1050 |
|
|
# When the target name changes, replace the cached result.
|
1051 |
|
|
|
1052 |
|
|
proc check_effective_target_fortran_largest_fp_has_sqrt { } {
|
1053 |
|
|
return [check_no_compiler_messages fortran_largest_fp_has_sqrt executable {
|
1054 |
|
|
! Fortran
|
1055 |
|
|
use iso_fortran_env, only: real_kinds
|
1056 |
|
|
integer,parameter:: maxFP = real_kinds(ubound(real_kinds,dim=1))
|
1057 |
|
|
real(kind=maxFP), volatile :: x
|
1058 |
|
|
x = 2.0_maxFP
|
1059 |
|
|
x = sqrt (x)
|
1060 |
|
|
end
|
1061 |
|
|
}]
|
1062 |
|
|
}
|
1063 |
|
|
|
1064 |
|
|
|
1065 |
|
|
# Return 1 if the target supports Fortran integer kinds larger than
|
1066 |
|
|
# integer(8), 0 otherwise.
|
1067 |
|
|
#
|
1068 |
|
|
# When the target name changes, replace the cached result.
|
1069 |
|
|
|
1070 |
|
|
proc check_effective_target_fortran_large_int { } {
|
1071 |
|
|
return [check_no_compiler_messages fortran_large_int executable {
|
1072 |
|
|
! Fortran
|
1073 |
|
|
integer,parameter :: k = selected_int_kind (range (0_8) + 1)
|
1074 |
|
|
integer(kind=k) :: i
|
1075 |
|
|
end
|
1076 |
|
|
}]
|
1077 |
|
|
}
|
1078 |
|
|
|
1079 |
|
|
# Return 1 if the target supports Fortran integer(16), 0 otherwise.
|
1080 |
|
|
#
|
1081 |
|
|
# When the target name changes, replace the cached result.
|
1082 |
|
|
|
1083 |
|
|
proc check_effective_target_fortran_integer_16 { } {
|
1084 |
|
|
return [check_no_compiler_messages fortran_integer_16 executable {
|
1085 |
|
|
! Fortran
|
1086 |
|
|
integer(16) :: i
|
1087 |
|
|
end
|
1088 |
|
|
}]
|
1089 |
|
|
}
|
1090 |
|
|
|
1091 |
|
|
# Return 1 if we can statically link libgfortran, 0 otherwise.
|
1092 |
|
|
#
|
1093 |
|
|
# When the target name changes, replace the cached result.
|
1094 |
|
|
|
1095 |
|
|
proc check_effective_target_static_libgfortran { } {
|
1096 |
|
|
return [check_no_compiler_messages static_libgfortran executable {
|
1097 |
|
|
! Fortran
|
1098 |
|
|
print *, 'test'
|
1099 |
|
|
end
|
1100 |
|
|
} "-static"]
|
1101 |
|
|
}
|
1102 |
|
|
|
1103 |
|
|
proc check_linker_plugin_available { } {
|
1104 |
|
|
return [check_no_compiler_messages_nocache linker_plugin executable {
|
1105 |
|
|
int main() { return 0; }
|
1106 |
|
|
} "-flto -fuse-linker-plugin"]
|
1107 |
|
|
}
|
1108 |
|
|
|
1109 |
|
|
# Return 1 if the target supports executing 750CL paired-single instructions, 0
|
1110 |
|
|
# otherwise. Cache the result.
|
1111 |
|
|
|
1112 |
|
|
proc check_750cl_hw_available { } {
|
1113 |
|
|
return [check_cached_effective_target 750cl_hw_available {
|
1114 |
|
|
# If this is not the right target then we can skip the test.
|
1115 |
|
|
if { ![istarget powerpc-*paired*] } {
|
1116 |
|
|
expr 0
|
1117 |
|
|
} else {
|
1118 |
|
|
check_runtime_nocache 750cl_hw_available {
|
1119 |
|
|
int main()
|
1120 |
|
|
{
|
1121 |
|
|
#ifdef __MACH__
|
1122 |
|
|
asm volatile ("ps_mul v0,v0,v0");
|
1123 |
|
|
#else
|
1124 |
|
|
asm volatile ("ps_mul 0,0,0");
|
1125 |
|
|
#endif
|
1126 |
|
|
return 0;
|
1127 |
|
|
}
|
1128 |
|
|
} "-mpaired"
|
1129 |
|
|
}
|
1130 |
|
|
}]
|
1131 |
|
|
}
|
1132 |
|
|
|
1133 |
|
|
# Return 1 if the target OS supports running SSE executables, 0
|
1134 |
|
|
# otherwise. Cache the result.
|
1135 |
|
|
|
1136 |
|
|
proc check_sse_os_support_available { } {
|
1137 |
|
|
return [check_cached_effective_target sse_os_support_available {
|
1138 |
|
|
# If this is not the right target then we can skip the test.
|
1139 |
|
|
if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
|
1140 |
|
|
expr 0
|
1141 |
|
|
} elseif { [istarget i?86-*-solaris2*] } {
|
1142 |
|
|
# The Solaris 2 kernel doesn't save and restore SSE registers
|
1143 |
|
|
# before Solaris 9 4/04. Before that, executables die with SIGILL.
|
1144 |
|
|
check_runtime_nocache sse_os_support_available {
|
1145 |
|
|
int main ()
|
1146 |
|
|
{
|
1147 |
|
|
asm volatile ("movaps %xmm0,%xmm0");
|
1148 |
|
|
return 0;
|
1149 |
|
|
}
|
1150 |
|
|
} "-msse"
|
1151 |
|
|
} else {
|
1152 |
|
|
expr 1
|
1153 |
|
|
}
|
1154 |
|
|
}]
|
1155 |
|
|
}
|
1156 |
|
|
|
1157 |
|
|
# Return 1 if the target OS supports running AVX executables, 0
|
1158 |
|
|
# otherwise. Cache the result.
|
1159 |
|
|
|
1160 |
|
|
proc check_avx_os_support_available { } {
|
1161 |
|
|
return [check_cached_effective_target avx_os_support_available {
|
1162 |
|
|
# If this is not the right target then we can skip the test.
|
1163 |
|
|
if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
|
1164 |
|
|
expr 0
|
1165 |
|
|
} else {
|
1166 |
|
|
# Check that OS has AVX and SSE saving enabled.
|
1167 |
|
|
check_runtime_nocache avx_os_support_available {
|
1168 |
|
|
int main ()
|
1169 |
|
|
{
|
1170 |
|
|
unsigned int eax, edx;
|
1171 |
|
|
|
1172 |
|
|
asm ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
|
1173 |
|
|
return (eax & 6) != 6;
|
1174 |
|
|
}
|
1175 |
|
|
} ""
|
1176 |
|
|
}
|
1177 |
|
|
}]
|
1178 |
|
|
}
|
1179 |
|
|
|
1180 |
|
|
# Return 1 if the target supports executing SSE instructions, 0
|
1181 |
|
|
# otherwise. Cache the result.
|
1182 |
|
|
|
1183 |
|
|
proc check_sse_hw_available { } {
|
1184 |
|
|
return [check_cached_effective_target sse_hw_available {
|
1185 |
|
|
# If this is not the right target then we can skip the test.
|
1186 |
|
|
if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
|
1187 |
|
|
expr 0
|
1188 |
|
|
} else {
|
1189 |
|
|
check_runtime_nocache sse_hw_available {
|
1190 |
|
|
#include "cpuid.h"
|
1191 |
|
|
int main ()
|
1192 |
|
|
{
|
1193 |
|
|
unsigned int eax, ebx, ecx, edx;
|
1194 |
|
|
if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
|
1195 |
|
|
return !(edx & bit_SSE);
|
1196 |
|
|
return 1;
|
1197 |
|
|
}
|
1198 |
|
|
} ""
|
1199 |
|
|
}
|
1200 |
|
|
}]
|
1201 |
|
|
}
|
1202 |
|
|
|
1203 |
|
|
# Return 1 if the target supports executing SSE2 instructions, 0
|
1204 |
|
|
# otherwise. Cache the result.
|
1205 |
|
|
|
1206 |
|
|
proc check_sse2_hw_available { } {
|
1207 |
|
|
return [check_cached_effective_target sse2_hw_available {
|
1208 |
|
|
# If this is not the right target then we can skip the test.
|
1209 |
|
|
if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
|
1210 |
|
|
expr 0
|
1211 |
|
|
} else {
|
1212 |
|
|
check_runtime_nocache sse2_hw_available {
|
1213 |
|
|
#include "cpuid.h"
|
1214 |
|
|
int main ()
|
1215 |
|
|
{
|
1216 |
|
|
unsigned int eax, ebx, ecx, edx;
|
1217 |
|
|
if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
|
1218 |
|
|
return !(edx & bit_SSE2);
|
1219 |
|
|
return 1;
|
1220 |
|
|
}
|
1221 |
|
|
} ""
|
1222 |
|
|
}
|
1223 |
|
|
}]
|
1224 |
|
|
}
|
1225 |
|
|
|
1226 |
|
|
# Return 1 if the target supports executing AVX instructions, 0
|
1227 |
|
|
# otherwise. Cache the result.
|
1228 |
|
|
|
1229 |
|
|
proc check_avx_hw_available { } {
|
1230 |
|
|
return [check_cached_effective_target avx_hw_available {
|
1231 |
|
|
# If this is not the right target then we can skip the test.
|
1232 |
|
|
if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
|
1233 |
|
|
expr 0
|
1234 |
|
|
} else {
|
1235 |
|
|
check_runtime_nocache avx_hw_available {
|
1236 |
|
|
#include "cpuid.h"
|
1237 |
|
|
int main ()
|
1238 |
|
|
{
|
1239 |
|
|
unsigned int eax, ebx, ecx, edx;
|
1240 |
|
|
if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
|
1241 |
|
|
return ((ecx & (bit_AVX | bit_OSXSAVE))
|
1242 |
|
|
!= (bit_AVX | bit_OSXSAVE));
|
1243 |
|
|
return 1;
|
1244 |
|
|
}
|
1245 |
|
|
} ""
|
1246 |
|
|
}
|
1247 |
|
|
}]
|
1248 |
|
|
}
|
1249 |
|
|
|
1250 |
|
|
# Return 1 if the target supports running SSE executables, 0 otherwise.
|
1251 |
|
|
|
1252 |
|
|
proc check_effective_target_sse_runtime { } {
|
1253 |
|
|
if { [check_effective_target_sse]
|
1254 |
|
|
&& [check_sse_hw_available]
|
1255 |
|
|
&& [check_sse_os_support_available] } {
|
1256 |
|
|
return 1
|
1257 |
|
|
}
|
1258 |
|
|
return 0
|
1259 |
|
|
}
|
1260 |
|
|
|
1261 |
|
|
# Return 1 if the target supports running SSE2 executables, 0 otherwise.
|
1262 |
|
|
|
1263 |
|
|
proc check_effective_target_sse2_runtime { } {
|
1264 |
|
|
if { [check_effective_target_sse2]
|
1265 |
|
|
&& [check_sse2_hw_available]
|
1266 |
|
|
&& [check_sse_os_support_available] } {
|
1267 |
|
|
return 1
|
1268 |
|
|
}
|
1269 |
|
|
return 0
|
1270 |
|
|
}
|
1271 |
|
|
|
1272 |
|
|
# Return 1 if the target supports running AVX executables, 0 otherwise.
|
1273 |
|
|
|
1274 |
|
|
proc check_effective_target_avx_runtime { } {
|
1275 |
|
|
if { [check_effective_target_avx]
|
1276 |
|
|
&& [check_avx_hw_available]
|
1277 |
|
|
&& [check_avx_os_support_available] } {
|
1278 |
|
|
return 1
|
1279 |
|
|
}
|
1280 |
|
|
return 0
|
1281 |
|
|
}
|
1282 |
|
|
|
1283 |
|
|
# Return 1 if the target supports executing VSX instructions, 0
|
1284 |
|
|
# otherwise. Cache the result.
|
1285 |
|
|
|
1286 |
|
|
proc check_vsx_hw_available { } {
|
1287 |
|
|
return [check_cached_effective_target vsx_hw_available {
|
1288 |
|
|
# Some simulators are known to not support VSX instructions.
|
1289 |
|
|
# For now, disable on Darwin
|
1290 |
|
|
if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
|
1291 |
|
|
expr 0
|
1292 |
|
|
} else {
|
1293 |
|
|
set options "-mvsx"
|
1294 |
|
|
check_runtime_nocache vsx_hw_available {
|
1295 |
|
|
int main()
|
1296 |
|
|
{
|
1297 |
|
|
#ifdef __MACH__
|
1298 |
|
|
asm volatile ("xxlor vs0,vs0,vs0");
|
1299 |
|
|
#else
|
1300 |
|
|
asm volatile ("xxlor 0,0,0");
|
1301 |
|
|
#endif
|
1302 |
|
|
return 0;
|
1303 |
|
|
}
|
1304 |
|
|
} $options
|
1305 |
|
|
}
|
1306 |
|
|
}]
|
1307 |
|
|
}
|
1308 |
|
|
|
1309 |
|
|
# Return 1 if the target supports executing AltiVec instructions, 0
|
1310 |
|
|
# otherwise. Cache the result.
|
1311 |
|
|
|
1312 |
|
|
proc check_vmx_hw_available { } {
|
1313 |
|
|
return [check_cached_effective_target vmx_hw_available {
|
1314 |
|
|
# Some simulators are known to not support VMX instructions.
|
1315 |
|
|
if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] } {
|
1316 |
|
|
expr 0
|
1317 |
|
|
} else {
|
1318 |
|
|
# Most targets don't require special flags for this test case, but
|
1319 |
|
|
# Darwin does. Just to be sure, make sure VSX is not enabled for
|
1320 |
|
|
# the altivec tests.
|
1321 |
|
|
if { [istarget *-*-darwin*]
|
1322 |
|
|
|| [istarget *-*-aix*] } {
|
1323 |
|
|
set options "-maltivec -mno-vsx"
|
1324 |
|
|
} else {
|
1325 |
|
|
set options "-mno-vsx"
|
1326 |
|
|
}
|
1327 |
|
|
check_runtime_nocache vmx_hw_available {
|
1328 |
|
|
int main()
|
1329 |
|
|
{
|
1330 |
|
|
#ifdef __MACH__
|
1331 |
|
|
asm volatile ("vor v0,v0,v0");
|
1332 |
|
|
#else
|
1333 |
|
|
asm volatile ("vor 0,0,0");
|
1334 |
|
|
#endif
|
1335 |
|
|
return 0;
|
1336 |
|
|
}
|
1337 |
|
|
} $options
|
1338 |
|
|
}
|
1339 |
|
|
}]
|
1340 |
|
|
}
|
1341 |
|
|
|
1342 |
|
|
proc check_ppc_recip_hw_available { } {
|
1343 |
|
|
return [check_cached_effective_target ppc_recip_hw_available {
|
1344 |
|
|
# Some simulators may not support FRE/FRES/FRSQRTE/FRSQRTES
|
1345 |
|
|
# For now, disable on Darwin
|
1346 |
|
|
if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
|
1347 |
|
|
expr 0
|
1348 |
|
|
} else {
|
1349 |
|
|
set options "-mpowerpc-gfxopt -mpowerpc-gpopt -mpopcntb"
|
1350 |
|
|
check_runtime_nocache ppc_recip_hw_available {
|
1351 |
|
|
volatile double d_recip, d_rsqrt, d_four = 4.0;
|
1352 |
|
|
volatile float f_recip, f_rsqrt, f_four = 4.0f;
|
1353 |
|
|
int main()
|
1354 |
|
|
{
|
1355 |
|
|
asm volatile ("fres %0,%1" : "=f" (f_recip) : "f" (f_four));
|
1356 |
|
|
asm volatile ("fre %0,%1" : "=d" (d_recip) : "d" (d_four));
|
1357 |
|
|
asm volatile ("frsqrtes %0,%1" : "=f" (f_rsqrt) : "f" (f_four));
|
1358 |
|
|
asm volatile ("frsqrte %0,%1" : "=f" (d_rsqrt) : "d" (d_four));
|
1359 |
|
|
return 0;
|
1360 |
|
|
}
|
1361 |
|
|
} $options
|
1362 |
|
|
}
|
1363 |
|
|
}]
|
1364 |
|
|
}
|
1365 |
|
|
|
1366 |
|
|
# Return 1 if the target supports executing AltiVec and Cell PPU
|
1367 |
|
|
# instructions, 0 otherwise. Cache the result.
|
1368 |
|
|
|
1369 |
|
|
proc check_effective_target_cell_hw { } {
|
1370 |
|
|
return [check_cached_effective_target cell_hw_available {
|
1371 |
|
|
# Some simulators are known to not support VMX and PPU instructions.
|
1372 |
|
|
if { [istarget powerpc-*-eabi*] } {
|
1373 |
|
|
expr 0
|
1374 |
|
|
} else {
|
1375 |
|
|
# Most targets don't require special flags for this test
|
1376 |
|
|
# case, but Darwin and AIX do.
|
1377 |
|
|
if { [istarget *-*-darwin*]
|
1378 |
|
|
|| [istarget *-*-aix*] } {
|
1379 |
|
|
set options "-maltivec -mcpu=cell"
|
1380 |
|
|
} else {
|
1381 |
|
|
set options "-mcpu=cell"
|
1382 |
|
|
}
|
1383 |
|
|
check_runtime_nocache cell_hw_available {
|
1384 |
|
|
int main()
|
1385 |
|
|
{
|
1386 |
|
|
#ifdef __MACH__
|
1387 |
|
|
asm volatile ("vor v0,v0,v0");
|
1388 |
|
|
asm volatile ("lvlx v0,r0,r0");
|
1389 |
|
|
#else
|
1390 |
|
|
asm volatile ("vor 0,0,0");
|
1391 |
|
|
asm volatile ("lvlx 0,0,0");
|
1392 |
|
|
#endif
|
1393 |
|
|
return 0;
|
1394 |
|
|
}
|
1395 |
|
|
} $options
|
1396 |
|
|
}
|
1397 |
|
|
}]
|
1398 |
|
|
}
|
1399 |
|
|
|
1400 |
|
|
# Return 1 if the target supports executing 64-bit instructions, 0
|
1401 |
|
|
# otherwise. Cache the result.
|
1402 |
|
|
|
1403 |
|
|
proc check_effective_target_powerpc64 { } {
|
1404 |
|
|
global powerpc64_available_saved
|
1405 |
|
|
global tool
|
1406 |
|
|
|
1407 |
|
|
if [info exists powerpc64_available_saved] {
|
1408 |
|
|
verbose "check_effective_target_powerpc64 returning saved $powerpc64_available_saved" 2
|
1409 |
|
|
} else {
|
1410 |
|
|
set powerpc64_available_saved 0
|
1411 |
|
|
|
1412 |
|
|
# Some simulators are known to not support powerpc64 instructions.
|
1413 |
|
|
if { [istarget powerpc-*-eabi*] || [istarget powerpc-ibm-aix*] } {
|
1414 |
|
|
verbose "check_effective_target_powerpc64 returning 0" 2
|
1415 |
|
|
return $powerpc64_available_saved
|
1416 |
|
|
}
|
1417 |
|
|
|
1418 |
|
|
# Set up, compile, and execute a test program containing a 64-bit
|
1419 |
|
|
# instruction. Include the current process ID in the file
|
1420 |
|
|
# names to prevent conflicts with invocations for multiple
|
1421 |
|
|
# testsuites.
|
1422 |
|
|
set src ppc[pid].c
|
1423 |
|
|
set exe ppc[pid].x
|
1424 |
|
|
|
1425 |
|
|
set f [open $src "w"]
|
1426 |
|
|
puts $f "int main() {"
|
1427 |
|
|
puts $f "#ifdef __MACH__"
|
1428 |
|
|
puts $f " asm volatile (\"extsw r0,r0\");"
|
1429 |
|
|
puts $f "#else"
|
1430 |
|
|
puts $f " asm volatile (\"extsw 0,0\");"
|
1431 |
|
|
puts $f "#endif"
|
1432 |
|
|
puts $f " return 0; }"
|
1433 |
|
|
close $f
|
1434 |
|
|
|
1435 |
|
|
set opts "additional_flags=-mcpu=G5"
|
1436 |
|
|
|
1437 |
|
|
verbose "check_effective_target_powerpc64 compiling testfile $src" 2
|
1438 |
|
|
set lines [${tool}_target_compile $src $exe executable "$opts"]
|
1439 |
|
|
file delete $src
|
1440 |
|
|
|
1441 |
|
|
if [string match "" $lines] then {
|
1442 |
|
|
# No error message, compilation succeeded.
|
1443 |
|
|
set result [${tool}_load "./$exe" "" ""]
|
1444 |
|
|
set status [lindex $result 0]
|
1445 |
|
|
remote_file build delete $exe
|
1446 |
|
|
verbose "check_effective_target_powerpc64 testfile status is <$status>" 2
|
1447 |
|
|
|
1448 |
|
|
if { $status == "pass" } then {
|
1449 |
|
|
set powerpc64_available_saved 1
|
1450 |
|
|
}
|
1451 |
|
|
} else {
|
1452 |
|
|
verbose "check_effective_target_powerpc64 testfile compilation failed" 2
|
1453 |
|
|
}
|
1454 |
|
|
}
|
1455 |
|
|
|
1456 |
|
|
return $powerpc64_available_saved
|
1457 |
|
|
}
|
1458 |
|
|
|
1459 |
|
|
# GCC 3.4.0 for powerpc64-*-linux* included an ABI fix for passing
|
1460 |
|
|
# complex float arguments. This affects gfortran tests that call cabsf
|
1461 |
|
|
# in libm built by an earlier compiler. Return 1 if libm uses the same
|
1462 |
|
|
# argument passing as the compiler under test, 0 otherwise.
|
1463 |
|
|
#
|
1464 |
|
|
# When the target name changes, replace the cached result.
|
1465 |
|
|
|
1466 |
|
|
proc check_effective_target_broken_cplxf_arg { } {
|
1467 |
|
|
return [check_cached_effective_target broken_cplxf_arg {
|
1468 |
|
|
# Skip the work for targets known not to be affected.
|
1469 |
|
|
if { ![istarget powerpc64-*-linux*] } {
|
1470 |
|
|
expr 0
|
1471 |
|
|
} elseif { ![is-effective-target lp64] } {
|
1472 |
|
|
expr 0
|
1473 |
|
|
} else {
|
1474 |
|
|
check_runtime_nocache broken_cplxf_arg {
|
1475 |
|
|
#include
|
1476 |
|
|
extern void abort (void);
|
1477 |
|
|
float fabsf (float);
|
1478 |
|
|
float cabsf (_Complex float);
|
1479 |
|
|
int main ()
|
1480 |
|
|
{
|
1481 |
|
|
_Complex float cf;
|
1482 |
|
|
float f;
|
1483 |
|
|
cf = 3 + 4.0fi;
|
1484 |
|
|
f = cabsf (cf);
|
1485 |
|
|
if (fabsf (f - 5.0) > 0.0001)
|
1486 |
|
|
abort ();
|
1487 |
|
|
return 0;
|
1488 |
|
|
}
|
1489 |
|
|
} "-lm"
|
1490 |
|
|
}
|
1491 |
|
|
}]
|
1492 |
|
|
}
|
1493 |
|
|
|
1494 |
|
|
# Return 1 is this is a TI C6X target supporting C67X instructions
|
1495 |
|
|
proc check_effective_target_ti_c67x { } {
|
1496 |
|
|
return [check_no_compiler_messages ti_c67x assembly {
|
1497 |
|
|
#if !defined(_TMS320C6700)
|
1498 |
|
|
#error FOO
|
1499 |
|
|
#endif
|
1500 |
|
|
}]
|
1501 |
|
|
}
|
1502 |
|
|
|
1503 |
|
|
# Return 1 is this is a TI C6X target supporting C64X+ instructions
|
1504 |
|
|
proc check_effective_target_ti_c64xp { } {
|
1505 |
|
|
return [check_no_compiler_messages ti_c64xp assembly {
|
1506 |
|
|
#if !defined(_TMS320C6400_PLUS)
|
1507 |
|
|
#error FOO
|
1508 |
|
|
#endif
|
1509 |
|
|
}]
|
1510 |
|
|
}
|
1511 |
|
|
|
1512 |
|
|
|
1513 |
|
|
proc check_alpha_max_hw_available { } {
|
1514 |
|
|
return [check_runtime alpha_max_hw_available {
|
1515 |
|
|
int main() { return __builtin_alpha_amask(1<<8) != 0; }
|
1516 |
|
|
}]
|
1517 |
|
|
}
|
1518 |
|
|
|
1519 |
|
|
# Returns true iff the FUNCTION is available on the target system.
|
1520 |
|
|
# (This is essentially a Tcl implementation of Autoconf's
|
1521 |
|
|
# AC_CHECK_FUNC.)
|
1522 |
|
|
|
1523 |
|
|
proc check_function_available { function } {
|
1524 |
|
|
return [check_no_compiler_messages ${function}_available \
|
1525 |
|
|
executable [subst {
|
1526 |
|
|
#ifdef __cplusplus
|
1527 |
|
|
extern "C"
|
1528 |
|
|
#endif
|
1529 |
|
|
char $function ();
|
1530 |
|
|
int main () { $function (); }
|
1531 |
|
|
}] "-fno-builtin" ]
|
1532 |
|
|
}
|
1533 |
|
|
|
1534 |
|
|
# Returns true iff "fork" is available on the target system.
|
1535 |
|
|
|
1536 |
|
|
proc check_fork_available {} {
|
1537 |
|
|
return [check_function_available "fork"]
|
1538 |
|
|
}
|
1539 |
|
|
|
1540 |
|
|
# Returns true iff "mkfifo" is available on the target system.
|
1541 |
|
|
|
1542 |
|
|
proc check_mkfifo_available {} {
|
1543 |
|
|
if { [istarget *-*-cygwin*] } {
|
1544 |
|
|
# Cygwin has mkfifo, but support is incomplete.
|
1545 |
|
|
return 0
|
1546 |
|
|
}
|
1547 |
|
|
|
1548 |
|
|
return [check_function_available "mkfifo"]
|
1549 |
|
|
}
|
1550 |
|
|
|
1551 |
|
|
# Returns true iff "__cxa_atexit" is used on the target system.
|
1552 |
|
|
|
1553 |
|
|
proc check_cxa_atexit_available { } {
|
1554 |
|
|
return [check_cached_effective_target cxa_atexit_available {
|
1555 |
|
|
if { [istarget hppa*-*-hpux10*] } {
|
1556 |
|
|
# HP-UX 10 doesn't have __cxa_atexit but subsequent test passes.
|
1557 |
|
|
expr 0
|
1558 |
|
|
} elseif { [istarget *-*-vxworks] } {
|
1559 |
|
|
# vxworks doesn't have __cxa_atexit but subsequent test passes.
|
1560 |
|
|
expr 0
|
1561 |
|
|
} else {
|
1562 |
|
|
check_runtime_nocache cxa_atexit_available {
|
1563 |
|
|
// C++
|
1564 |
|
|
#include
|
1565 |
|
|
static unsigned int count;
|
1566 |
|
|
struct X
|
1567 |
|
|
{
|
1568 |
|
|
X() { count = 1; }
|
1569 |
|
|
~X()
|
1570 |
|
|
{
|
1571 |
|
|
if (count != 3)
|
1572 |
|
|
exit(1);
|
1573 |
|
|
count = 4;
|
1574 |
|
|
}
|
1575 |
|
|
};
|
1576 |
|
|
void f()
|
1577 |
|
|
{
|
1578 |
|
|
static X x;
|
1579 |
|
|
}
|
1580 |
|
|
struct Y
|
1581 |
|
|
{
|
1582 |
|
|
Y() { f(); count = 2; }
|
1583 |
|
|
~Y()
|
1584 |
|
|
{
|
1585 |
|
|
if (count != 2)
|
1586 |
|
|
exit(1);
|
1587 |
|
|
count = 3;
|
1588 |
|
|
}
|
1589 |
|
|
};
|
1590 |
|
|
Y y;
|
1591 |
|
|
int main() { return 0; }
|
1592 |
|
|
}
|
1593 |
|
|
}
|
1594 |
|
|
}]
|
1595 |
|
|
}
|
1596 |
|
|
|
1597 |
|
|
proc check_effective_target_objc2 { } {
|
1598 |
|
|
return [check_no_compiler_messages objc2 object {
|
1599 |
|
|
#ifdef __OBJC2__
|
1600 |
|
|
int dummy[1];
|
1601 |
|
|
#else
|
1602 |
|
|
#error
|
1603 |
|
|
#endif
|
1604 |
|
|
}]
|
1605 |
|
|
}
|
1606 |
|
|
|
1607 |
|
|
proc check_effective_target_next_runtime { } {
|
1608 |
|
|
return [check_no_compiler_messages objc2 object {
|
1609 |
|
|
#ifdef __NEXT_RUNTIME__
|
1610 |
|
|
int dummy[1];
|
1611 |
|
|
#else
|
1612 |
|
|
#error
|
1613 |
|
|
#endif
|
1614 |
|
|
}]
|
1615 |
|
|
}
|
1616 |
|
|
|
1617 |
|
|
# Return 1 if we're generating 32-bit code using default options, 0
|
1618 |
|
|
# otherwise.
|
1619 |
|
|
|
1620 |
|
|
proc check_effective_target_ilp32 { } {
|
1621 |
|
|
return [check_no_compiler_messages ilp32 object {
|
1622 |
|
|
int dummy[sizeof (int) == 4
|
1623 |
|
|
&& sizeof (void *) == 4
|
1624 |
|
|
&& sizeof (long) == 4 ? 1 : -1];
|
1625 |
|
|
}]
|
1626 |
|
|
}
|
1627 |
|
|
|
1628 |
|
|
# Return 1 if we're generating ia32 code using default options, 0
|
1629 |
|
|
# otherwise.
|
1630 |
|
|
|
1631 |
|
|
proc check_effective_target_ia32 { } {
|
1632 |
|
|
return [check_no_compiler_messages ia32 object {
|
1633 |
|
|
int dummy[sizeof (int) == 4
|
1634 |
|
|
&& sizeof (void *) == 4
|
1635 |
|
|
&& sizeof (long) == 4 ? 1 : -1] = { __i386__ };
|
1636 |
|
|
}]
|
1637 |
|
|
}
|
1638 |
|
|
|
1639 |
|
|
# Return 1 if we're generating x32 code using default options, 0
|
1640 |
|
|
# otherwise.
|
1641 |
|
|
|
1642 |
|
|
proc check_effective_target_x32 { } {
|
1643 |
|
|
return [check_no_compiler_messages x32 object {
|
1644 |
|
|
int dummy[sizeof (int) == 4
|
1645 |
|
|
&& sizeof (void *) == 4
|
1646 |
|
|
&& sizeof (long) == 4 ? 1 : -1] = { __x86_64__ };
|
1647 |
|
|
}]
|
1648 |
|
|
}
|
1649 |
|
|
|
1650 |
|
|
# Return 1 if we're generating 32-bit or larger integers using default
|
1651 |
|
|
# options, 0 otherwise.
|
1652 |
|
|
|
1653 |
|
|
proc check_effective_target_int32plus { } {
|
1654 |
|
|
return [check_no_compiler_messages int32plus object {
|
1655 |
|
|
int dummy[sizeof (int) >= 4 ? 1 : -1];
|
1656 |
|
|
}]
|
1657 |
|
|
}
|
1658 |
|
|
|
1659 |
|
|
# Return 1 if we're generating 32-bit or larger pointers using default
|
1660 |
|
|
# options, 0 otherwise.
|
1661 |
|
|
|
1662 |
|
|
proc check_effective_target_ptr32plus { } {
|
1663 |
|
|
return [check_no_compiler_messages ptr32plus object {
|
1664 |
|
|
int dummy[sizeof (void *) >= 4 ? 1 : -1];
|
1665 |
|
|
}]
|
1666 |
|
|
}
|
1667 |
|
|
|
1668 |
|
|
# Return 1 if we support 32-bit or larger array and structure sizes
|
1669 |
|
|
# using default options, 0 otherwise.
|
1670 |
|
|
|
1671 |
|
|
proc check_effective_target_size32plus { } {
|
1672 |
|
|
return [check_no_compiler_messages size32plus object {
|
1673 |
|
|
char dummy[65537];
|
1674 |
|
|
}]
|
1675 |
|
|
}
|
1676 |
|
|
|
1677 |
|
|
# Returns 1 if we're generating 16-bit or smaller integers with the
|
1678 |
|
|
# default options, 0 otherwise.
|
1679 |
|
|
|
1680 |
|
|
proc check_effective_target_int16 { } {
|
1681 |
|
|
return [check_no_compiler_messages int16 object {
|
1682 |
|
|
int dummy[sizeof (int) < 4 ? 1 : -1];
|
1683 |
|
|
}]
|
1684 |
|
|
}
|
1685 |
|
|
|
1686 |
|
|
# Return 1 if we're generating 64-bit code using default options, 0
|
1687 |
|
|
# otherwise.
|
1688 |
|
|
|
1689 |
|
|
proc check_effective_target_lp64 { } {
|
1690 |
|
|
return [check_no_compiler_messages lp64 object {
|
1691 |
|
|
int dummy[sizeof (int) == 4
|
1692 |
|
|
&& sizeof (void *) == 8
|
1693 |
|
|
&& sizeof (long) == 8 ? 1 : -1];
|
1694 |
|
|
}]
|
1695 |
|
|
}
|
1696 |
|
|
|
1697 |
|
|
# Return 1 if we're generating 64-bit code using default llp64 options,
|
1698 |
|
|
# 0 otherwise.
|
1699 |
|
|
|
1700 |
|
|
proc check_effective_target_llp64 { } {
|
1701 |
|
|
return [check_no_compiler_messages llp64 object {
|
1702 |
|
|
int dummy[sizeof (int) == 4
|
1703 |
|
|
&& sizeof (void *) == 8
|
1704 |
|
|
&& sizeof (long long) == 8
|
1705 |
|
|
&& sizeof (long) == 4 ? 1 : -1];
|
1706 |
|
|
}]
|
1707 |
|
|
}
|
1708 |
|
|
|
1709 |
|
|
# Return 1 if the target supports long double larger than double,
|
1710 |
|
|
# 0 otherwise.
|
1711 |
|
|
|
1712 |
|
|
proc check_effective_target_large_long_double { } {
|
1713 |
|
|
return [check_no_compiler_messages large_long_double object {
|
1714 |
|
|
int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
|
1715 |
|
|
}]
|
1716 |
|
|
}
|
1717 |
|
|
|
1718 |
|
|
# Return 1 if the target supports double larger than float,
|
1719 |
|
|
# 0 otherwise.
|
1720 |
|
|
|
1721 |
|
|
proc check_effective_target_large_double { } {
|
1722 |
|
|
return [check_no_compiler_messages large_double object {
|
1723 |
|
|
int dummy[sizeof(double) > sizeof(float) ? 1 : -1];
|
1724 |
|
|
}]
|
1725 |
|
|
}
|
1726 |
|
|
|
1727 |
|
|
# Return 1 if the target supports double of 64 bits,
|
1728 |
|
|
# 0 otherwise.
|
1729 |
|
|
|
1730 |
|
|
proc check_effective_target_double64 { } {
|
1731 |
|
|
return [check_no_compiler_messages double64 object {
|
1732 |
|
|
int dummy[sizeof(double) == 8 ? 1 : -1];
|
1733 |
|
|
}]
|
1734 |
|
|
}
|
1735 |
|
|
|
1736 |
|
|
# Return 1 if the target supports double of at least 64 bits,
|
1737 |
|
|
# 0 otherwise.
|
1738 |
|
|
|
1739 |
|
|
proc check_effective_target_double64plus { } {
|
1740 |
|
|
return [check_no_compiler_messages double64plus object {
|
1741 |
|
|
int dummy[sizeof(double) >= 8 ? 1 : -1];
|
1742 |
|
|
}]
|
1743 |
|
|
}
|
1744 |
|
|
|
1745 |
|
|
# Return 1 if the target supports compiling fixed-point,
|
1746 |
|
|
# 0 otherwise.
|
1747 |
|
|
|
1748 |
|
|
proc check_effective_target_fixed_point { } {
|
1749 |
|
|
return [check_no_compiler_messages fixed_point object {
|
1750 |
|
|
_Sat _Fract x; _Sat _Accum y;
|
1751 |
|
|
}]
|
1752 |
|
|
}
|
1753 |
|
|
|
1754 |
|
|
# Return 1 if the target supports compiling decimal floating point,
|
1755 |
|
|
# 0 otherwise.
|
1756 |
|
|
|
1757 |
|
|
proc check_effective_target_dfp_nocache { } {
|
1758 |
|
|
verbose "check_effective_target_dfp_nocache: compiling source" 2
|
1759 |
|
|
set ret [check_no_compiler_messages_nocache dfp object {
|
1760 |
|
|
float x __attribute__((mode(DD)));
|
1761 |
|
|
}]
|
1762 |
|
|
verbose "check_effective_target_dfp_nocache: returning $ret" 2
|
1763 |
|
|
return $ret
|
1764 |
|
|
}
|
1765 |
|
|
|
1766 |
|
|
proc check_effective_target_dfprt_nocache { } {
|
1767 |
|
|
return [check_runtime_nocache dfprt {
|
1768 |
|
|
typedef float d64 __attribute__((mode(DD)));
|
1769 |
|
|
d64 x = 1.2df, y = 2.3dd, z;
|
1770 |
|
|
int main () { z = x + y; return 0; }
|
1771 |
|
|
}]
|
1772 |
|
|
}
|
1773 |
|
|
|
1774 |
|
|
# Return 1 if the target supports compiling Decimal Floating Point,
|
1775 |
|
|
# 0 otherwise.
|
1776 |
|
|
#
|
1777 |
|
|
# This won't change for different subtargets so cache the result.
|
1778 |
|
|
|
1779 |
|
|
proc check_effective_target_dfp { } {
|
1780 |
|
|
return [check_cached_effective_target dfp {
|
1781 |
|
|
check_effective_target_dfp_nocache
|
1782 |
|
|
}]
|
1783 |
|
|
}
|
1784 |
|
|
|
1785 |
|
|
# Return 1 if the target supports linking and executing Decimal Floating
|
1786 |
|
|
# Point, 0 otherwise.
|
1787 |
|
|
#
|
1788 |
|
|
# This won't change for different subtargets so cache the result.
|
1789 |
|
|
|
1790 |
|
|
proc check_effective_target_dfprt { } {
|
1791 |
|
|
return [check_cached_effective_target dfprt {
|
1792 |
|
|
check_effective_target_dfprt_nocache
|
1793 |
|
|
}]
|
1794 |
|
|
}
|
1795 |
|
|
|
1796 |
|
|
# Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
|
1797 |
|
|
|
1798 |
|
|
proc check_effective_target_ucn_nocache { } {
|
1799 |
|
|
# -std=c99 is only valid for C
|
1800 |
|
|
if [check_effective_target_c] {
|
1801 |
|
|
set ucnopts "-std=c99"
|
1802 |
|
|
}
|
1803 |
|
|
append ucnopts " -fextended-identifiers"
|
1804 |
|
|
verbose "check_effective_target_ucn_nocache: compiling source" 2
|
1805 |
|
|
set ret [check_no_compiler_messages_nocache ucn object {
|
1806 |
|
|
int \u00C0;
|
1807 |
|
|
} $ucnopts]
|
1808 |
|
|
verbose "check_effective_target_ucn_nocache: returning $ret" 2
|
1809 |
|
|
return $ret
|
1810 |
|
|
}
|
1811 |
|
|
|
1812 |
|
|
# Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
|
1813 |
|
|
#
|
1814 |
|
|
# This won't change for different subtargets, so cache the result.
|
1815 |
|
|
|
1816 |
|
|
proc check_effective_target_ucn { } {
|
1817 |
|
|
return [check_cached_effective_target ucn {
|
1818 |
|
|
check_effective_target_ucn_nocache
|
1819 |
|
|
}]
|
1820 |
|
|
}
|
1821 |
|
|
|
1822 |
|
|
# Return 1 if the target needs a command line argument to enable a SIMD
|
1823 |
|
|
# instruction set.
|
1824 |
|
|
|
1825 |
|
|
proc check_effective_target_vect_cmdline_needed { } {
|
1826 |
|
|
global et_vect_cmdline_needed_saved
|
1827 |
|
|
global et_vect_cmdline_needed_target_name
|
1828 |
|
|
|
1829 |
|
|
if { ![info exists et_vect_cmdline_needed_target_name] } {
|
1830 |
|
|
set et_vect_cmdline_needed_target_name ""
|
1831 |
|
|
}
|
1832 |
|
|
|
1833 |
|
|
# If the target has changed since we set the cached value, clear it.
|
1834 |
|
|
set current_target [current_target_name]
|
1835 |
|
|
if { $current_target != $et_vect_cmdline_needed_target_name } {
|
1836 |
|
|
verbose "check_effective_target_vect_cmdline_needed: `$et_vect_cmdline_needed_target_name' `$current_target'" 2
|
1837 |
|
|
set et_vect_cmdline_needed_target_name $current_target
|
1838 |
|
|
if { [info exists et_vect_cmdline_needed_saved] } {
|
1839 |
|
|
verbose "check_effective_target_vect_cmdline_needed: removing cached result" 2
|
1840 |
|
|
unset et_vect_cmdline_needed_saved
|
1841 |
|
|
}
|
1842 |
|
|
}
|
1843 |
|
|
|
1844 |
|
|
if [info exists et_vect_cmdline_needed_saved] {
|
1845 |
|
|
verbose "check_effective_target_vect_cmdline_needed: using cached result" 2
|
1846 |
|
|
} else {
|
1847 |
|
|
set et_vect_cmdline_needed_saved 1
|
1848 |
|
|
if { [istarget alpha*-*-*]
|
1849 |
|
|
|| [istarget ia64-*-*]
|
1850 |
|
|
|| (([istarget x86_64-*-*] || [istarget i?86-*-*])
|
1851 |
|
|
&& ([check_effective_target_x32]
|
1852 |
|
|
|| [check_effective_target_lp64]))
|
1853 |
|
|
|| ([istarget powerpc*-*-*]
|
1854 |
|
|
&& ([check_effective_target_powerpc_spe]
|
1855 |
|
|
|| [check_effective_target_powerpc_altivec]))
|
1856 |
|
|
|| ([istarget sparc*-*-*] && [check_effective_target_sparc_vis])
|
1857 |
|
|
|| [istarget spu-*-*]
|
1858 |
|
|
|| ([istarget arm*-*-*] && [check_effective_target_arm_neon]) } {
|
1859 |
|
|
set et_vect_cmdline_needed_saved 0
|
1860 |
|
|
}
|
1861 |
|
|
}
|
1862 |
|
|
|
1863 |
|
|
verbose "check_effective_target_vect_cmdline_needed: returning $et_vect_cmdline_needed_saved" 2
|
1864 |
|
|
return $et_vect_cmdline_needed_saved
|
1865 |
|
|
}
|
1866 |
|
|
|
1867 |
|
|
# Return 1 if the target supports hardware vectors of int, 0 otherwise.
|
1868 |
|
|
#
|
1869 |
|
|
# This won't change for different subtargets so cache the result.
|
1870 |
|
|
|
1871 |
|
|
proc check_effective_target_vect_int { } {
|
1872 |
|
|
global et_vect_int_saved
|
1873 |
|
|
|
1874 |
|
|
if [info exists et_vect_int_saved] {
|
1875 |
|
|
verbose "check_effective_target_vect_int: using cached result" 2
|
1876 |
|
|
} else {
|
1877 |
|
|
set et_vect_int_saved 0
|
1878 |
|
|
if { [istarget i?86-*-*]
|
1879 |
|
|
|| ([istarget powerpc*-*-*]
|
1880 |
|
|
&& ![istarget powerpc-*-linux*paired*])
|
1881 |
|
|
|| [istarget spu-*-*]
|
1882 |
|
|
|| [istarget x86_64-*-*]
|
1883 |
|
|
|| [istarget sparc*-*-*]
|
1884 |
|
|
|| [istarget alpha*-*-*]
|
1885 |
|
|
|| [istarget ia64-*-*]
|
1886 |
|
|
|| [check_effective_target_arm32]
|
1887 |
|
|
|| ([istarget mips*-*-*]
|
1888 |
|
|
&& [check_effective_target_mips_loongson]) } {
|
1889 |
|
|
set et_vect_int_saved 1
|
1890 |
|
|
}
|
1891 |
|
|
}
|
1892 |
|
|
|
1893 |
|
|
verbose "check_effective_target_vect_int: returning $et_vect_int_saved" 2
|
1894 |
|
|
return $et_vect_int_saved
|
1895 |
|
|
}
|
1896 |
|
|
|
1897 |
|
|
# Return 1 if the target supports signed int->float conversion
|
1898 |
|
|
#
|
1899 |
|
|
|
1900 |
|
|
proc check_effective_target_vect_intfloat_cvt { } {
|
1901 |
|
|
global et_vect_intfloat_cvt_saved
|
1902 |
|
|
|
1903 |
|
|
if [info exists et_vect_intfloat_cvt_saved] {
|
1904 |
|
|
verbose "check_effective_target_vect_intfloat_cvt: using cached result" 2
|
1905 |
|
|
} else {
|
1906 |
|
|
set et_vect_intfloat_cvt_saved 0
|
1907 |
|
|
if { [istarget i?86-*-*]
|
1908 |
|
|
|| ([istarget powerpc*-*-*]
|
1909 |
|
|
&& ![istarget powerpc-*-linux*paired*])
|
1910 |
|
|
|| [istarget x86_64-*-*]
|
1911 |
|
|
|| ([istarget arm*-*-*]
|
1912 |
|
|
&& [check_effective_target_arm_neon_ok])} {
|
1913 |
|
|
set et_vect_intfloat_cvt_saved 1
|
1914 |
|
|
}
|
1915 |
|
|
}
|
1916 |
|
|
|
1917 |
|
|
verbose "check_effective_target_vect_intfloat_cvt: returning $et_vect_intfloat_cvt_saved" 2
|
1918 |
|
|
return $et_vect_intfloat_cvt_saved
|
1919 |
|
|
}
|
1920 |
|
|
|
1921 |
|
|
#Return 1 if we're supporting __int128 for target, 0 otherwise.
|
1922 |
|
|
|
1923 |
|
|
proc check_effective_target_int128 { } {
|
1924 |
|
|
return [check_no_compiler_messages int128 object {
|
1925 |
|
|
int dummy[
|
1926 |
|
|
#ifndef __SIZEOF_INT128__
|
1927 |
|
|
-1
|
1928 |
|
|
#else
|
1929 |
|
|
1
|
1930 |
|
|
#endif
|
1931 |
|
|
];
|
1932 |
|
|
}]
|
1933 |
|
|
}
|
1934 |
|
|
|
1935 |
|
|
# Return 1 if the target supports unsigned int->float conversion
|
1936 |
|
|
#
|
1937 |
|
|
|
1938 |
|
|
proc check_effective_target_vect_uintfloat_cvt { } {
|
1939 |
|
|
global et_vect_uintfloat_cvt_saved
|
1940 |
|
|
|
1941 |
|
|
if [info exists et_vect_uintfloat_cvt_saved] {
|
1942 |
|
|
verbose "check_effective_target_vect_uintfloat_cvt: using cached result" 2
|
1943 |
|
|
} else {
|
1944 |
|
|
set et_vect_uintfloat_cvt_saved 0
|
1945 |
|
|
if { [istarget i?86-*-*]
|
1946 |
|
|
|| ([istarget powerpc*-*-*]
|
1947 |
|
|
&& ![istarget powerpc-*-linux*paired*])
|
1948 |
|
|
|| [istarget x86_64-*-*]
|
1949 |
|
|
|| ([istarget arm*-*-*]
|
1950 |
|
|
&& [check_effective_target_arm_neon_ok])} {
|
1951 |
|
|
set et_vect_uintfloat_cvt_saved 1
|
1952 |
|
|
}
|
1953 |
|
|
}
|
1954 |
|
|
|
1955 |
|
|
verbose "check_effective_target_vect_uintfloat_cvt: returning $et_vect_uintfloat_cvt_saved" 2
|
1956 |
|
|
return $et_vect_uintfloat_cvt_saved
|
1957 |
|
|
}
|
1958 |
|
|
|
1959 |
|
|
|
1960 |
|
|
# Return 1 if the target supports signed float->int conversion
|
1961 |
|
|
#
|
1962 |
|
|
|
1963 |
|
|
proc check_effective_target_vect_floatint_cvt { } {
|
1964 |
|
|
global et_vect_floatint_cvt_saved
|
1965 |
|
|
|
1966 |
|
|
if [info exists et_vect_floatint_cvt_saved] {
|
1967 |
|
|
verbose "check_effective_target_vect_floatint_cvt: using cached result" 2
|
1968 |
|
|
} else {
|
1969 |
|
|
set et_vect_floatint_cvt_saved 0
|
1970 |
|
|
if { [istarget i?86-*-*]
|
1971 |
|
|
|| ([istarget powerpc*-*-*]
|
1972 |
|
|
&& ![istarget powerpc-*-linux*paired*])
|
1973 |
|
|
|| [istarget x86_64-*-*]
|
1974 |
|
|
|| ([istarget arm*-*-*]
|
1975 |
|
|
&& [check_effective_target_arm_neon_ok])} {
|
1976 |
|
|
set et_vect_floatint_cvt_saved 1
|
1977 |
|
|
}
|
1978 |
|
|
}
|
1979 |
|
|
|
1980 |
|
|
verbose "check_effective_target_vect_floatint_cvt: returning $et_vect_floatint_cvt_saved" 2
|
1981 |
|
|
return $et_vect_floatint_cvt_saved
|
1982 |
|
|
}
|
1983 |
|
|
|
1984 |
|
|
# Return 1 if the target supports unsigned float->int conversion
|
1985 |
|
|
#
|
1986 |
|
|
|
1987 |
|
|
proc check_effective_target_vect_floatuint_cvt { } {
|
1988 |
|
|
global et_vect_floatuint_cvt_saved
|
1989 |
|
|
|
1990 |
|
|
if [info exists et_vect_floatuint_cvt_saved] {
|
1991 |
|
|
verbose "check_effective_target_vect_floatuint_cvt: using cached result" 2
|
1992 |
|
|
} else {
|
1993 |
|
|
set et_vect_floatuint_cvt_saved 0
|
1994 |
|
|
if { ([istarget powerpc*-*-*]
|
1995 |
|
|
&& ![istarget powerpc-*-linux*paired*])
|
1996 |
|
|
|| ([istarget arm*-*-*]
|
1997 |
|
|
&& [check_effective_target_arm_neon_ok])} {
|
1998 |
|
|
set et_vect_floatuint_cvt_saved 1
|
1999 |
|
|
}
|
2000 |
|
|
}
|
2001 |
|
|
|
2002 |
|
|
verbose "check_effective_target_vect_floatuint_cvt: returning $et_vect_floatuint_cvt_saved" 2
|
2003 |
|
|
return $et_vect_floatuint_cvt_saved
|
2004 |
|
|
}
|
2005 |
|
|
|
2006 |
|
|
# Return 1 is this is an arm target using 32-bit instructions
|
2007 |
|
|
proc check_effective_target_arm32 { } {
|
2008 |
|
|
return [check_no_compiler_messages arm32 assembly {
|
2009 |
|
|
#if !defined(__arm__) || (defined(__thumb__) && !defined(__thumb2__))
|
2010 |
|
|
#error FOO
|
2011 |
|
|
#endif
|
2012 |
|
|
}]
|
2013 |
|
|
}
|
2014 |
|
|
|
2015 |
|
|
# Return 1 is this is an arm target not using Thumb
|
2016 |
|
|
proc check_effective_target_arm_nothumb { } {
|
2017 |
|
|
return [check_no_compiler_messages arm_nothumb assembly {
|
2018 |
|
|
#if (defined(__thumb__) || defined(__thumb2__))
|
2019 |
|
|
#error FOO
|
2020 |
|
|
#endif
|
2021 |
|
|
}]
|
2022 |
|
|
}
|
2023 |
|
|
|
2024 |
|
|
# Return 1 if this is a little-endian ARM target
|
2025 |
|
|
proc check_effective_target_arm_little_endian { } {
|
2026 |
|
|
return [check_no_compiler_messages arm_little_endian assembly {
|
2027 |
|
|
#if !defined(__arm__) || !defined(__ARMEL__)
|
2028 |
|
|
#error FOO
|
2029 |
|
|
#endif
|
2030 |
|
|
}]
|
2031 |
|
|
}
|
2032 |
|
|
|
2033 |
|
|
# Return 1 if this is an ARM target that only supports aligned vector accesses
|
2034 |
|
|
proc check_effective_target_arm_vect_no_misalign { } {
|
2035 |
|
|
return [check_no_compiler_messages arm_vect_no_misalign assembly {
|
2036 |
|
|
#if !defined(__arm__) \
|
2037 |
|
|
|| (defined(__ARMEL__) \
|
2038 |
|
|
&& (!defined(__thumb__) || defined(__thumb2__)))
|
2039 |
|
|
#error FOO
|
2040 |
|
|
#endif
|
2041 |
|
|
}]
|
2042 |
|
|
}
|
2043 |
|
|
|
2044 |
|
|
|
2045 |
|
|
# Return 1 if this is an ARM target supporting -mfpu=vfp
|
2046 |
|
|
# -mfloat-abi=softfp. Some multilibs may be incompatible with these
|
2047 |
|
|
# options.
|
2048 |
|
|
|
2049 |
|
|
proc check_effective_target_arm_vfp_ok { } {
|
2050 |
|
|
if { [check_effective_target_arm32] } {
|
2051 |
|
|
return [check_no_compiler_messages arm_vfp_ok object {
|
2052 |
|
|
int dummy;
|
2053 |
|
|
} "-mfpu=vfp -mfloat-abi=softfp"]
|
2054 |
|
|
} else {
|
2055 |
|
|
return 0
|
2056 |
|
|
}
|
2057 |
|
|
}
|
2058 |
|
|
|
2059 |
|
|
# Return 1 if this is an ARM target supporting -mfpu=vfp
|
2060 |
|
|
# -mfloat-abi=hard. Some multilibs may be incompatible with these
|
2061 |
|
|
# options.
|
2062 |
|
|
|
2063 |
|
|
proc check_effective_target_arm_hard_vfp_ok { } {
|
2064 |
|
|
if { [check_effective_target_arm32] } {
|
2065 |
|
|
return [check_no_compiler_messages arm_hard_vfp_ok executable {
|
2066 |
|
|
int main() { return 0;}
|
2067 |
|
|
} "-mfpu=vfp -mfloat-abi=hard"]
|
2068 |
|
|
} else {
|
2069 |
|
|
return 0
|
2070 |
|
|
}
|
2071 |
|
|
}
|
2072 |
|
|
|
2073 |
|
|
# Return 1 if this is an ARM target that supports DSP multiply with
|
2074 |
|
|
# current multilib flags.
|
2075 |
|
|
|
2076 |
|
|
proc check_effective_target_arm_dsp { } {
|
2077 |
|
|
return [check_no_compiler_messages arm_dsp assembly {
|
2078 |
|
|
#ifndef __ARM_FEATURE_DSP
|
2079 |
|
|
#error not DSP
|
2080 |
|
|
#endif
|
2081 |
|
|
int i;
|
2082 |
|
|
}]
|
2083 |
|
|
}
|
2084 |
|
|
|
2085 |
|
|
# Return 1 if this is an ARM target that supports unaligned word/halfword
|
2086 |
|
|
# load/store instructions.
|
2087 |
|
|
|
2088 |
|
|
proc check_effective_target_arm_unaligned { } {
|
2089 |
|
|
return [check_no_compiler_messages arm_unaligned assembly {
|
2090 |
|
|
#ifndef __ARM_FEATURE_UNALIGNED
|
2091 |
|
|
#error no unaligned support
|
2092 |
|
|
#endif
|
2093 |
|
|
int i;
|
2094 |
|
|
}]
|
2095 |
|
|
}
|
2096 |
|
|
|
2097 |
|
|
# Add the options needed for NEON. We need either -mfloat-abi=softfp
|
2098 |
|
|
# or -mfloat-abi=hard, but if one is already specified by the
|
2099 |
|
|
# multilib, use it. Similarly, if a -mfpu option already enables
|
2100 |
|
|
# NEON, do not add -mfpu=neon.
|
2101 |
|
|
|
2102 |
|
|
proc add_options_for_arm_neon { flags } {
|
2103 |
|
|
if { ! [check_effective_target_arm_neon_ok] } {
|
2104 |
|
|
return "$flags"
|
2105 |
|
|
}
|
2106 |
|
|
global et_arm_neon_flags
|
2107 |
|
|
return "$flags $et_arm_neon_flags"
|
2108 |
|
|
}
|
2109 |
|
|
|
2110 |
|
|
# Return 1 if this is an ARM target supporting -mfpu=neon
|
2111 |
|
|
# -mfloat-abi=softfp or equivalent options. Some multilibs may be
|
2112 |
|
|
# incompatible with these options. Also set et_arm_neon_flags to the
|
2113 |
|
|
# best options to add.
|
2114 |
|
|
|
2115 |
|
|
proc check_effective_target_arm_neon_ok_nocache { } {
|
2116 |
|
|
global et_arm_neon_flags
|
2117 |
|
|
set et_arm_neon_flags ""
|
2118 |
|
|
if { [check_effective_target_arm32] } {
|
2119 |
|
|
foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon" "-mfpu=neon -mfloat-abi=softfp"} {
|
2120 |
|
|
if { [check_no_compiler_messages_nocache arm_neon_ok object {
|
2121 |
|
|
#include "arm_neon.h"
|
2122 |
|
|
int dummy;
|
2123 |
|
|
} "$flags"] } {
|
2124 |
|
|
set et_arm_neon_flags $flags
|
2125 |
|
|
return 1
|
2126 |
|
|
}
|
2127 |
|
|
}
|
2128 |
|
|
}
|
2129 |
|
|
|
2130 |
|
|
return 0
|
2131 |
|
|
}
|
2132 |
|
|
|
2133 |
|
|
proc check_effective_target_arm_neon_ok { } {
|
2134 |
|
|
return [check_cached_effective_target arm_neon_ok \
|
2135 |
|
|
check_effective_target_arm_neon_ok_nocache]
|
2136 |
|
|
}
|
2137 |
|
|
|
2138 |
|
|
# Add the options needed for NEON. We need either -mfloat-abi=softfp
|
2139 |
|
|
# or -mfloat-abi=hard, but if one is already specified by the
|
2140 |
|
|
# multilib, use it.
|
2141 |
|
|
|
2142 |
|
|
proc add_options_for_arm_fp16 { flags } {
|
2143 |
|
|
if { ! [check_effective_target_arm_fp16_ok] } {
|
2144 |
|
|
return "$flags"
|
2145 |
|
|
}
|
2146 |
|
|
global et_arm_fp16_flags
|
2147 |
|
|
return "$flags $et_arm_fp16_flags"
|
2148 |
|
|
}
|
2149 |
|
|
|
2150 |
|
|
# Return 1 if this is an ARM target that can support a VFP fp16 variant.
|
2151 |
|
|
# Skip multilibs that are incompatible with these options and set
|
2152 |
|
|
# et_arm_fp16_flags to the best options to add.
|
2153 |
|
|
|
2154 |
|
|
proc check_effective_target_arm_fp16_ok_nocache { } {
|
2155 |
|
|
global et_arm_fp16_flags
|
2156 |
|
|
set et_arm_fp16_flags ""
|
2157 |
|
|
if { ! [check_effective_target_arm32] } {
|
2158 |
|
|
return 0;
|
2159 |
|
|
}
|
2160 |
|
|
if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "-mfpu=*fp16*" "-mfpu=*fpv[4-9]*" "-mfpu=*fpv[1-9][0-9]*" } ]] {
|
2161 |
|
|
# Multilib flags would override -mfpu.
|
2162 |
|
|
return 0
|
2163 |
|
|
}
|
2164 |
|
|
if [check-flags [list "" { *-*-* } { "-mfloat-abi=soft" } { "" } ]] {
|
2165 |
|
|
# Must generate floating-point instructions.
|
2166 |
|
|
return 0
|
2167 |
|
|
}
|
2168 |
|
|
if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "" } ]] {
|
2169 |
|
|
# The existing -mfpu value is OK; use it, but add softfp.
|
2170 |
|
|
set et_arm_fp16_flags "-mfloat-abi=softfp"
|
2171 |
|
|
return 1;
|
2172 |
|
|
}
|
2173 |
|
|
# Add -mfpu for a VFP fp16 variant since there is no preprocessor
|
2174 |
|
|
# macro to check for this support.
|
2175 |
|
|
set flags "-mfpu=vfpv4 -mfloat-abi=softfp"
|
2176 |
|
|
if { [check_no_compiler_messages_nocache arm_fp16_ok assembly {
|
2177 |
|
|
int dummy;
|
2178 |
|
|
} "$flags"] } {
|
2179 |
|
|
set et_arm_fp16_flags "$flags"
|
2180 |
|
|
return 1
|
2181 |
|
|
}
|
2182 |
|
|
|
2183 |
|
|
return 0
|
2184 |
|
|
}
|
2185 |
|
|
|
2186 |
|
|
proc check_effective_target_arm_fp16_ok { } {
|
2187 |
|
|
return [check_cached_effective_target arm_fp16_ok \
|
2188 |
|
|
check_effective_target_arm_fp16_ok_nocache]
|
2189 |
|
|
}
|
2190 |
|
|
|
2191 |
|
|
# Creates a series of routines that return 1 if the given architecture
|
2192 |
|
|
# can be selected and a routine to give the flags to select that architecture
|
2193 |
|
|
# Note: Extra flags may be added to disable options from newer compilers
|
2194 |
|
|
# (Thumb in particular - but others may be added in the future)
|
2195 |
|
|
# Usage: /* { dg-require-effective-target arm_arch_v5_ok } */
|
2196 |
|
|
# /* { dg-add-options arm_arch_v5 } */
|
2197 |
|
|
foreach { armfunc armflag armdef } { v5 "-march=armv5 -marm" __ARM_ARCH_5__
|
2198 |
|
|
v6 "-march=armv6" __ARM_ARCH_6__
|
2199 |
|
|
v6k "-march=armv6k" __ARM_ARCH_6K__
|
2200 |
|
|
v7a "-march=armv7-a" __ARM_ARCH_7A__ } {
|
2201 |
|
|
eval [string map [list FUNC $armfunc FLAG $armflag DEF $armdef ] {
|
2202 |
|
|
proc check_effective_target_arm_arch_FUNC_ok { } {
|
2203 |
|
|
if { [ string match "*-marm*" "FLAG" ] &&
|
2204 |
|
|
![check_effective_target_arm_arm_ok] } {
|
2205 |
|
|
return 0
|
2206 |
|
|
}
|
2207 |
|
|
return [check_no_compiler_messages arm_arch_FUNC_ok assembly {
|
2208 |
|
|
#if !defined (DEF)
|
2209 |
|
|
#error FOO
|
2210 |
|
|
#endif
|
2211 |
|
|
} "FLAG" ]
|
2212 |
|
|
}
|
2213 |
|
|
|
2214 |
|
|
proc add_options_for_arm_arch_FUNC { flags } {
|
2215 |
|
|
return "$flags FLAG"
|
2216 |
|
|
}
|
2217 |
|
|
}]
|
2218 |
|
|
}
|
2219 |
|
|
|
2220 |
|
|
# Return 1 if this is an ARM target where -marm causes ARM to be
|
2221 |
|
|
# used (not Thumb)
|
2222 |
|
|
|
2223 |
|
|
proc check_effective_target_arm_arm_ok { } {
|
2224 |
|
|
return [check_no_compiler_messages arm_arm_ok assembly {
|
2225 |
|
|
#if !defined (__arm__) || defined (__thumb__) || defined (__thumb2__)
|
2226 |
|
|
#error FOO
|
2227 |
|
|
#endif
|
2228 |
|
|
} "-marm"]
|
2229 |
|
|
}
|
2230 |
|
|
|
2231 |
|
|
|
2232 |
|
|
# Return 1 is this is an ARM target where -mthumb causes Thumb-1 to be
|
2233 |
|
|
# used.
|
2234 |
|
|
|
2235 |
|
|
proc check_effective_target_arm_thumb1_ok { } {
|
2236 |
|
|
return [check_no_compiler_messages arm_thumb1_ok assembly {
|
2237 |
|
|
#if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
|
2238 |
|
|
#error FOO
|
2239 |
|
|
#endif
|
2240 |
|
|
} "-mthumb"]
|
2241 |
|
|
}
|
2242 |
|
|
|
2243 |
|
|
# Return 1 is this is an ARM target where -mthumb causes Thumb-2 to be
|
2244 |
|
|
# used.
|
2245 |
|
|
|
2246 |
|
|
proc check_effective_target_arm_thumb2_ok { } {
|
2247 |
|
|
return [check_no_compiler_messages arm_thumb2_ok assembly {
|
2248 |
|
|
#if !defined(__thumb2__)
|
2249 |
|
|
#error FOO
|
2250 |
|
|
#endif
|
2251 |
|
|
} "-mthumb"]
|
2252 |
|
|
}
|
2253 |
|
|
|
2254 |
|
|
# Return 1 if this is an ARM target where Thumb-1 is used without options
|
2255 |
|
|
# added by the test.
|
2256 |
|
|
|
2257 |
|
|
proc check_effective_target_arm_thumb1 { } {
|
2258 |
|
|
return [check_no_compiler_messages arm_thumb1 assembly {
|
2259 |
|
|
#if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
|
2260 |
|
|
#error not thumb1
|
2261 |
|
|
#endif
|
2262 |
|
|
int i;
|
2263 |
|
|
} ""]
|
2264 |
|
|
}
|
2265 |
|
|
|
2266 |
|
|
# Return 1 if this is an ARM target where Thumb-2 is used without options
|
2267 |
|
|
# added by the test.
|
2268 |
|
|
|
2269 |
|
|
proc check_effective_target_arm_thumb2 { } {
|
2270 |
|
|
return [check_no_compiler_messages arm_thumb2 assembly {
|
2271 |
|
|
#if !defined(__thumb2__)
|
2272 |
|
|
#error FOO
|
2273 |
|
|
#endif
|
2274 |
|
|
int i;
|
2275 |
|
|
} ""]
|
2276 |
|
|
}
|
2277 |
|
|
|
2278 |
|
|
# Return 1 if this is an ARM cortex-M profile cpu
|
2279 |
|
|
|
2280 |
|
|
proc check_effective_target_arm_cortex_m { } {
|
2281 |
|
|
return [check_no_compiler_messages arm_cortex_m assembly {
|
2282 |
|
|
#if !defined(__ARM_ARCH_7M__) \
|
2283 |
|
|
&& !defined (__ARM_ARCH_7EM__) \
|
2284 |
|
|
&& !defined (__ARM_ARCH_6M__)
|
2285 |
|
|
#error FOO
|
2286 |
|
|
#endif
|
2287 |
|
|
int i;
|
2288 |
|
|
} "-mthumb"]
|
2289 |
|
|
}
|
2290 |
|
|
|
2291 |
|
|
# Return 1 if the target supports executing NEON instructions, 0
|
2292 |
|
|
# otherwise. Cache the result.
|
2293 |
|
|
|
2294 |
|
|
proc check_effective_target_arm_neon_hw { } {
|
2295 |
|
|
return [check_runtime arm_neon_hw_available {
|
2296 |
|
|
int
|
2297 |
|
|
main (void)
|
2298 |
|
|
{
|
2299 |
|
|
long long a = 0, b = 1;
|
2300 |
|
|
asm ("vorr %P0, %P1, %P2"
|
2301 |
|
|
: "=w" (a)
|
2302 |
|
|
: "0" (a), "w" (b));
|
2303 |
|
|
return (a != 1);
|
2304 |
|
|
}
|
2305 |
|
|
} [add_options_for_arm_neon ""]]
|
2306 |
|
|
}
|
2307 |
|
|
|
2308 |
|
|
# Return 1 if this is a ARM target with NEON enabled.
|
2309 |
|
|
|
2310 |
|
|
proc check_effective_target_arm_neon { } {
|
2311 |
|
|
if { [check_effective_target_arm32] } {
|
2312 |
|
|
return [check_no_compiler_messages arm_neon object {
|
2313 |
|
|
#ifndef __ARM_NEON__
|
2314 |
|
|
#error not NEON
|
2315 |
|
|
#else
|
2316 |
|
|
int dummy;
|
2317 |
|
|
#endif
|
2318 |
|
|
}]
|
2319 |
|
|
} else {
|
2320 |
|
|
return 0
|
2321 |
|
|
}
|
2322 |
|
|
}
|
2323 |
|
|
|
2324 |
|
|
# Return 1 if this a Loongson-2E or -2F target using an ABI that supports
|
2325 |
|
|
# the Loongson vector modes.
|
2326 |
|
|
|
2327 |
|
|
proc check_effective_target_mips_loongson { } {
|
2328 |
|
|
return [check_no_compiler_messages loongson assembly {
|
2329 |
|
|
#if !defined(__mips_loongson_vector_rev)
|
2330 |
|
|
#error FOO
|
2331 |
|
|
#endif
|
2332 |
|
|
}]
|
2333 |
|
|
}
|
2334 |
|
|
|
2335 |
|
|
# Return 1 if this is an ARM target that adheres to the ABI for the ARM
|
2336 |
|
|
# Architecture.
|
2337 |
|
|
|
2338 |
|
|
proc check_effective_target_arm_eabi { } {
|
2339 |
|
|
return [check_no_compiler_messages arm_eabi object {
|
2340 |
|
|
#ifndef __ARM_EABI__
|
2341 |
|
|
#error not EABI
|
2342 |
|
|
#else
|
2343 |
|
|
int dummy;
|
2344 |
|
|
#endif
|
2345 |
|
|
}]
|
2346 |
|
|
}
|
2347 |
|
|
|
2348 |
|
|
# Return 1 if this is an ARM target supporting -mcpu=iwmmxt.
|
2349 |
|
|
# Some multilibs may be incompatible with this option.
|
2350 |
|
|
|
2351 |
|
|
proc check_effective_target_arm_iwmmxt_ok { } {
|
2352 |
|
|
if { [check_effective_target_arm32] } {
|
2353 |
|
|
return [check_no_compiler_messages arm_iwmmxt_ok object {
|
2354 |
|
|
int dummy;
|
2355 |
|
|
} "-mcpu=iwmmxt"]
|
2356 |
|
|
} else {
|
2357 |
|
|
return 0
|
2358 |
|
|
}
|
2359 |
|
|
}
|
2360 |
|
|
|
2361 |
|
|
# Return 1 if this is a PowerPC target with floating-point registers.
|
2362 |
|
|
|
2363 |
|
|
proc check_effective_target_powerpc_fprs { } {
|
2364 |
|
|
if { [istarget powerpc*-*-*]
|
2365 |
|
|
|| [istarget rs6000-*-*] } {
|
2366 |
|
|
return [check_no_compiler_messages powerpc_fprs object {
|
2367 |
|
|
#ifdef __NO_FPRS__
|
2368 |
|
|
#error no FPRs
|
2369 |
|
|
#else
|
2370 |
|
|
int dummy;
|
2371 |
|
|
#endif
|
2372 |
|
|
}]
|
2373 |
|
|
} else {
|
2374 |
|
|
return 0
|
2375 |
|
|
}
|
2376 |
|
|
}
|
2377 |
|
|
|
2378 |
|
|
# Return 1 if this is a PowerPC target with hardware double-precision
|
2379 |
|
|
# floating point.
|
2380 |
|
|
|
2381 |
|
|
proc check_effective_target_powerpc_hard_double { } {
|
2382 |
|
|
if { [istarget powerpc*-*-*]
|
2383 |
|
|
|| [istarget rs6000-*-*] } {
|
2384 |
|
|
return [check_no_compiler_messages powerpc_hard_double object {
|
2385 |
|
|
#ifdef _SOFT_DOUBLE
|
2386 |
|
|
#error soft double
|
2387 |
|
|
#else
|
2388 |
|
|
int dummy;
|
2389 |
|
|
#endif
|
2390 |
|
|
}]
|
2391 |
|
|
} else {
|
2392 |
|
|
return 0
|
2393 |
|
|
}
|
2394 |
|
|
}
|
2395 |
|
|
|
2396 |
|
|
# Return 1 if this is a PowerPC target supporting -maltivec.
|
2397 |
|
|
|
2398 |
|
|
proc check_effective_target_powerpc_altivec_ok { } {
|
2399 |
|
|
if { ([istarget powerpc*-*-*]
|
2400 |
|
|
&& ![istarget powerpc-*-linux*paired*])
|
2401 |
|
|
|| [istarget rs6000-*-*] } {
|
2402 |
|
|
# AltiVec is not supported on AIX before 5.3.
|
2403 |
|
|
if { [istarget powerpc*-*-aix4*]
|
2404 |
|
|
|| [istarget powerpc*-*-aix5.1*]
|
2405 |
|
|
|| [istarget powerpc*-*-aix5.2*] } {
|
2406 |
|
|
return 0
|
2407 |
|
|
}
|
2408 |
|
|
return [check_no_compiler_messages powerpc_altivec_ok object {
|
2409 |
|
|
int dummy;
|
2410 |
|
|
} "-maltivec"]
|
2411 |
|
|
} else {
|
2412 |
|
|
return 0
|
2413 |
|
|
}
|
2414 |
|
|
}
|
2415 |
|
|
|
2416 |
|
|
# Return 1 if this is a PowerPC target supporting -mvsx
|
2417 |
|
|
|
2418 |
|
|
proc check_effective_target_powerpc_vsx_ok { } {
|
2419 |
|
|
if { ([istarget powerpc*-*-*]
|
2420 |
|
|
&& ![istarget powerpc-*-linux*paired*])
|
2421 |
|
|
|| [istarget rs6000-*-*] } {
|
2422 |
|
|
# AltiVec is not supported on AIX before 5.3.
|
2423 |
|
|
if { [istarget powerpc*-*-aix4*]
|
2424 |
|
|
|| [istarget powerpc*-*-aix5.1*]
|
2425 |
|
|
|| [istarget powerpc*-*-aix5.2*] } {
|
2426 |
|
|
return 0
|
2427 |
|
|
}
|
2428 |
|
|
return [check_no_compiler_messages powerpc_vsx_ok object {
|
2429 |
|
|
int main (void) {
|
2430 |
|
|
#ifdef __MACH__
|
2431 |
|
|
asm volatile ("xxlor vs0,vs0,vs0");
|
2432 |
|
|
#else
|
2433 |
|
|
asm volatile ("xxlor 0,0,0");
|
2434 |
|
|
#endif
|
2435 |
|
|
return 0;
|
2436 |
|
|
}
|
2437 |
|
|
} "-mvsx"]
|
2438 |
|
|
} else {
|
2439 |
|
|
return 0
|
2440 |
|
|
}
|
2441 |
|
|
}
|
2442 |
|
|
|
2443 |
|
|
# Return 1 if this is a PowerPC target supporting -mcpu=cell.
|
2444 |
|
|
|
2445 |
|
|
proc check_effective_target_powerpc_ppu_ok { } {
|
2446 |
|
|
if [check_effective_target_powerpc_altivec_ok] {
|
2447 |
|
|
return [check_no_compiler_messages cell_asm_available object {
|
2448 |
|
|
int main (void) {
|
2449 |
|
|
#ifdef __MACH__
|
2450 |
|
|
asm volatile ("lvlx v0,v0,v0");
|
2451 |
|
|
#else
|
2452 |
|
|
asm volatile ("lvlx 0,0,0");
|
2453 |
|
|
#endif
|
2454 |
|
|
return 0;
|
2455 |
|
|
}
|
2456 |
|
|
}]
|
2457 |
|
|
} else {
|
2458 |
|
|
return 0
|
2459 |
|
|
}
|
2460 |
|
|
}
|
2461 |
|
|
|
2462 |
|
|
# Return 1 if this is a PowerPC target that supports SPU.
|
2463 |
|
|
|
2464 |
|
|
proc check_effective_target_powerpc_spu { } {
|
2465 |
|
|
if { [istarget powerpc*-*-linux*] } {
|
2466 |
|
|
return [check_effective_target_powerpc_altivec_ok]
|
2467 |
|
|
} else {
|
2468 |
|
|
return 0
|
2469 |
|
|
}
|
2470 |
|
|
}
|
2471 |
|
|
|
2472 |
|
|
# Return 1 if this is a PowerPC SPE target. The check includes options
|
2473 |
|
|
# specified by dg-options for this test, so don't cache the result.
|
2474 |
|
|
|
2475 |
|
|
proc check_effective_target_powerpc_spe_nocache { } {
|
2476 |
|
|
if { [istarget powerpc*-*-*] } {
|
2477 |
|
|
return [check_no_compiler_messages_nocache powerpc_spe object {
|
2478 |
|
|
#ifndef __SPE__
|
2479 |
|
|
#error not SPE
|
2480 |
|
|
#else
|
2481 |
|
|
int dummy;
|
2482 |
|
|
#endif
|
2483 |
|
|
} [current_compiler_flags]]
|
2484 |
|
|
} else {
|
2485 |
|
|
return 0
|
2486 |
|
|
}
|
2487 |
|
|
}
|
2488 |
|
|
|
2489 |
|
|
# Return 1 if this is a PowerPC target with SPE enabled.
|
2490 |
|
|
|
2491 |
|
|
proc check_effective_target_powerpc_spe { } {
|
2492 |
|
|
if { [istarget powerpc*-*-*] } {
|
2493 |
|
|
return [check_no_compiler_messages powerpc_spe object {
|
2494 |
|
|
#ifndef __SPE__
|
2495 |
|
|
#error not SPE
|
2496 |
|
|
#else
|
2497 |
|
|
int dummy;
|
2498 |
|
|
#endif
|
2499 |
|
|
}]
|
2500 |
|
|
} else {
|
2501 |
|
|
return 0
|
2502 |
|
|
}
|
2503 |
|
|
}
|
2504 |
|
|
|
2505 |
|
|
# Return 1 if this is a PowerPC target with Altivec enabled.
|
2506 |
|
|
|
2507 |
|
|
proc check_effective_target_powerpc_altivec { } {
|
2508 |
|
|
if { [istarget powerpc*-*-*] } {
|
2509 |
|
|
return [check_no_compiler_messages powerpc_altivec object {
|
2510 |
|
|
#ifndef __ALTIVEC__
|
2511 |
|
|
#error not Altivec
|
2512 |
|
|
#else
|
2513 |
|
|
int dummy;
|
2514 |
|
|
#endif
|
2515 |
|
|
}]
|
2516 |
|
|
} else {
|
2517 |
|
|
return 0
|
2518 |
|
|
}
|
2519 |
|
|
}
|
2520 |
|
|
|
2521 |
|
|
# Return 1 if this is a PowerPC 405 target. The check includes options
|
2522 |
|
|
# specified by dg-options for this test, so don't cache the result.
|
2523 |
|
|
|
2524 |
|
|
proc check_effective_target_powerpc_405_nocache { } {
|
2525 |
|
|
if { [istarget powerpc*-*-*] || [istarget rs6000-*-*] } {
|
2526 |
|
|
return [check_no_compiler_messages_nocache powerpc_405 object {
|
2527 |
|
|
#ifdef __PPC405__
|
2528 |
|
|
int dummy;
|
2529 |
|
|
#else
|
2530 |
|
|
#error not a PPC405
|
2531 |
|
|
#endif
|
2532 |
|
|
} [current_compiler_flags]]
|
2533 |
|
|
} else {
|
2534 |
|
|
return 0
|
2535 |
|
|
}
|
2536 |
|
|
}
|
2537 |
|
|
|
2538 |
|
|
# Return 1 if this is a SPU target with a toolchain that
|
2539 |
|
|
# supports automatic overlay generation.
|
2540 |
|
|
|
2541 |
|
|
proc check_effective_target_spu_auto_overlay { } {
|
2542 |
|
|
if { [istarget spu*-*-elf*] } {
|
2543 |
|
|
return [check_no_compiler_messages spu_auto_overlay executable {
|
2544 |
|
|
int main (void) { }
|
2545 |
|
|
} "-Wl,--auto-overlay" ]
|
2546 |
|
|
} else {
|
2547 |
|
|
return 0
|
2548 |
|
|
}
|
2549 |
|
|
}
|
2550 |
|
|
|
2551 |
|
|
# The VxWorks SPARC simulator accepts only EM_SPARC executables and
|
2552 |
|
|
# chokes on EM_SPARC32PLUS or EM_SPARCV9 executables. Return 1 if the
|
2553 |
|
|
# test environment appears to run executables on such a simulator.
|
2554 |
|
|
|
2555 |
|
|
proc check_effective_target_ultrasparc_hw { } {
|
2556 |
|
|
return [check_runtime ultrasparc_hw {
|
2557 |
|
|
int main() { return 0; }
|
2558 |
|
|
} "-mcpu=ultrasparc"]
|
2559 |
|
|
}
|
2560 |
|
|
|
2561 |
|
|
# Return 1 if the test environment supports executing UltraSPARC VIS2
|
2562 |
|
|
# instructions. We check this by attempting: "bmask %g0, %g0, %g0"
|
2563 |
|
|
|
2564 |
|
|
proc check_effective_target_ultrasparc_vis2_hw { } {
|
2565 |
|
|
return [check_runtime ultrasparc_vis2_hw {
|
2566 |
|
|
int main() { __asm__(".word 0x81b00320"); return 0; }
|
2567 |
|
|
} "-mcpu=ultrasparc3"]
|
2568 |
|
|
}
|
2569 |
|
|
|
2570 |
|
|
# Return 1 if the test environment supports executing UltraSPARC VIS3
|
2571 |
|
|
# instructions. We check this by attempting: "addxc %g0, %g0, %g0"
|
2572 |
|
|
|
2573 |
|
|
proc check_effective_target_ultrasparc_vis3_hw { } {
|
2574 |
|
|
return [check_runtime ultrasparc_vis3_hw {
|
2575 |
|
|
int main() { __asm__(".word 0x81b00220"); return 0; }
|
2576 |
|
|
} "-mcpu=niagara3"]
|
2577 |
|
|
}
|
2578 |
|
|
|
2579 |
|
|
# Return 1 if this is a Sparc target with VIS enabled.
|
2580 |
|
|
|
2581 |
|
|
proc check_effective_target_sparc_vis { } {
|
2582 |
|
|
if { [istarget sparc*-*-*] } {
|
2583 |
|
|
return [check_no_compiler_messages sparc_vis object {
|
2584 |
|
|
#ifndef __VIS__
|
2585 |
|
|
#error not VIS
|
2586 |
|
|
#else
|
2587 |
|
|
int dummy;
|
2588 |
|
|
#endif
|
2589 |
|
|
}]
|
2590 |
|
|
} else {
|
2591 |
|
|
return 0
|
2592 |
|
|
}
|
2593 |
|
|
}
|
2594 |
|
|
|
2595 |
|
|
# Return 1 if the target supports hardware vector shift operation.
|
2596 |
|
|
|
2597 |
|
|
proc check_effective_target_vect_shift { } {
|
2598 |
|
|
global et_vect_shift_saved
|
2599 |
|
|
|
2600 |
|
|
if [info exists et_vect_shift_saved] {
|
2601 |
|
|
verbose "check_effective_target_vect_shift: using cached result" 2
|
2602 |
|
|
} else {
|
2603 |
|
|
set et_vect_shift_saved 0
|
2604 |
|
|
if { ([istarget powerpc*-*-*]
|
2605 |
|
|
&& ![istarget powerpc-*-linux*paired*])
|
2606 |
|
|
|| [istarget ia64-*-*]
|
2607 |
|
|
|| [istarget i?86-*-*]
|
2608 |
|
|
|| [istarget x86_64-*-*]
|
2609 |
|
|
|| [check_effective_target_arm32]
|
2610 |
|
|
|| ([istarget mips*-*-*]
|
2611 |
|
|
&& [check_effective_target_mips_loongson]) } {
|
2612 |
|
|
set et_vect_shift_saved 1
|
2613 |
|
|
}
|
2614 |
|
|
}
|
2615 |
|
|
|
2616 |
|
|
verbose "check_effective_target_vect_shift: returning $et_vect_shift_saved" 2
|
2617 |
|
|
return $et_vect_shift_saved
|
2618 |
|
|
}
|
2619 |
|
|
|
2620 |
|
|
# Return 1 if the target supports hardware vector shift operation for char.
|
2621 |
|
|
|
2622 |
|
|
proc check_effective_target_vect_shift_char { } {
|
2623 |
|
|
global et_vect_shift_char_saved
|
2624 |
|
|
|
2625 |
|
|
if [info exists et_vect_shift_char_saved] {
|
2626 |
|
|
verbose "check_effective_target_vect_shift_char: using cached result" 2
|
2627 |
|
|
} else {
|
2628 |
|
|
set et_vect_shift_char_saved 0
|
2629 |
|
|
if { ([istarget powerpc*-*-*]
|
2630 |
|
|
&& ![istarget powerpc-*-linux*paired*])
|
2631 |
|
|
|| [check_effective_target_arm32] } {
|
2632 |
|
|
set et_vect_shift_char_saved 1
|
2633 |
|
|
}
|
2634 |
|
|
}
|
2635 |
|
|
|
2636 |
|
|
verbose "check_effective_target_vect_shift_char: returning $et_vect_shift_char_saved" 2
|
2637 |
|
|
return $et_vect_shift_char_saved
|
2638 |
|
|
}
|
2639 |
|
|
|
2640 |
|
|
# Return 1 if the target supports hardware vectors of long, 0 otherwise.
|
2641 |
|
|
#
|
2642 |
|
|
# This can change for different subtargets so do not cache the result.
|
2643 |
|
|
|
2644 |
|
|
proc check_effective_target_vect_long { } {
|
2645 |
|
|
if { [istarget i?86-*-*]
|
2646 |
|
|
|| (([istarget powerpc*-*-*]
|
2647 |
|
|
&& ![istarget powerpc-*-linux*paired*])
|
2648 |
|
|
&& [check_effective_target_ilp32])
|
2649 |
|
|
|| [istarget x86_64-*-*]
|
2650 |
|
|
|| [check_effective_target_arm32]
|
2651 |
|
|
|| ([istarget sparc*-*-*] && [check_effective_target_ilp32]) } {
|
2652 |
|
|
set answer 1
|
2653 |
|
|
} else {
|
2654 |
|
|
set answer 0
|
2655 |
|
|
}
|
2656 |
|
|
|
2657 |
|
|
verbose "check_effective_target_vect_long: returning $answer" 2
|
2658 |
|
|
return $answer
|
2659 |
|
|
}
|
2660 |
|
|
|
2661 |
|
|
# Return 1 if the target supports hardware vectors of float, 0 otherwise.
|
2662 |
|
|
#
|
2663 |
|
|
# This won't change for different subtargets so cache the result.
|
2664 |
|
|
|
2665 |
|
|
proc check_effective_target_vect_float { } {
|
2666 |
|
|
global et_vect_float_saved
|
2667 |
|
|
|
2668 |
|
|
if [info exists et_vect_float_saved] {
|
2669 |
|
|
verbose "check_effective_target_vect_float: using cached result" 2
|
2670 |
|
|
} else {
|
2671 |
|
|
set et_vect_float_saved 0
|
2672 |
|
|
if { [istarget i?86-*-*]
|
2673 |
|
|
|| [istarget powerpc*-*-*]
|
2674 |
|
|
|| [istarget spu-*-*]
|
2675 |
|
|
|| [istarget mipsisa64*-*-*]
|
2676 |
|
|
|| [istarget x86_64-*-*]
|
2677 |
|
|
|| [istarget ia64-*-*]
|
2678 |
|
|
|| [check_effective_target_arm32] } {
|
2679 |
|
|
set et_vect_float_saved 1
|
2680 |
|
|
}
|
2681 |
|
|
}
|
2682 |
|
|
|
2683 |
|
|
verbose "check_effective_target_vect_float: returning $et_vect_float_saved" 2
|
2684 |
|
|
return $et_vect_float_saved
|
2685 |
|
|
}
|
2686 |
|
|
|
2687 |
|
|
# Return 1 if the target supports hardware vectors of double, 0 otherwise.
|
2688 |
|
|
#
|
2689 |
|
|
# This won't change for different subtargets so cache the result.
|
2690 |
|
|
|
2691 |
|
|
proc check_effective_target_vect_double { } {
|
2692 |
|
|
global et_vect_double_saved
|
2693 |
|
|
|
2694 |
|
|
if [info exists et_vect_double_saved] {
|
2695 |
|
|
verbose "check_effective_target_vect_double: using cached result" 2
|
2696 |
|
|
} else {
|
2697 |
|
|
set et_vect_double_saved 0
|
2698 |
|
|
if { [istarget i?86-*-*]
|
2699 |
|
|
|| [istarget x86_64-*-*] } {
|
2700 |
|
|
if { [check_no_compiler_messages vect_double assembly {
|
2701 |
|
|
#ifdef __tune_atom__
|
2702 |
|
|
# error No double vectorizer support.
|
2703 |
|
|
#endif
|
2704 |
|
|
}] } {
|
2705 |
|
|
set et_vect_double_saved 1
|
2706 |
|
|
} else {
|
2707 |
|
|
set et_vect_double_saved 0
|
2708 |
|
|
}
|
2709 |
|
|
} elseif { [istarget spu-*-*] } {
|
2710 |
|
|
set et_vect_double_saved 1
|
2711 |
|
|
}
|
2712 |
|
|
}
|
2713 |
|
|
|
2714 |
|
|
verbose "check_effective_target_vect_double: returning $et_vect_double_saved" 2
|
2715 |
|
|
return $et_vect_double_saved
|
2716 |
|
|
}
|
2717 |
|
|
|
2718 |
|
|
# Return 1 if the target supports hardware vectors of long long, 0 otherwise.
|
2719 |
|
|
#
|
2720 |
|
|
# This won't change for different subtargets so cache the result.
|
2721 |
|
|
|
2722 |
|
|
proc check_effective_target_vect_long_long { } {
|
2723 |
|
|
global et_vect_long_long_saved
|
2724 |
|
|
|
2725 |
|
|
if [info exists et_vect_long_long_saved] {
|
2726 |
|
|
verbose "check_effective_target_vect_long_long: using cached result" 2
|
2727 |
|
|
} else {
|
2728 |
|
|
set et_vect_long_long_saved 0
|
2729 |
|
|
if { [istarget i?86-*-*]
|
2730 |
|
|
|| [istarget x86_64-*-*] } {
|
2731 |
|
|
set et_vect_long_long_saved 1
|
2732 |
|
|
}
|
2733 |
|
|
}
|
2734 |
|
|
|
2735 |
|
|
verbose "check_effective_target_vect_long_long: returning $et_vect_long_long_saved" 2
|
2736 |
|
|
return $et_vect_long_long_saved
|
2737 |
|
|
}
|
2738 |
|
|
|
2739 |
|
|
|
2740 |
|
|
# Return 1 if the target plus current options does not support a vector
|
2741 |
|
|
# max instruction on "int", 0 otherwise.
|
2742 |
|
|
#
|
2743 |
|
|
# This won't change for different subtargets so cache the result.
|
2744 |
|
|
|
2745 |
|
|
proc check_effective_target_vect_no_int_max { } {
|
2746 |
|
|
global et_vect_no_int_max_saved
|
2747 |
|
|
|
2748 |
|
|
if [info exists et_vect_no_int_max_saved] {
|
2749 |
|
|
verbose "check_effective_target_vect_no_int_max: using cached result" 2
|
2750 |
|
|
} else {
|
2751 |
|
|
set et_vect_no_int_max_saved 0
|
2752 |
|
|
if { [istarget sparc*-*-*]
|
2753 |
|
|
|| [istarget spu-*-*]
|
2754 |
|
|
|| [istarget alpha*-*-*]
|
2755 |
|
|
|| ([istarget mips*-*-*]
|
2756 |
|
|
&& [check_effective_target_mips_loongson]) } {
|
2757 |
|
|
set et_vect_no_int_max_saved 1
|
2758 |
|
|
}
|
2759 |
|
|
}
|
2760 |
|
|
verbose "check_effective_target_vect_no_int_max: returning $et_vect_no_int_max_saved" 2
|
2761 |
|
|
return $et_vect_no_int_max_saved
|
2762 |
|
|
}
|
2763 |
|
|
|
2764 |
|
|
# Return 1 if the target plus current options does not support a vector
|
2765 |
|
|
# add instruction on "int", 0 otherwise.
|
2766 |
|
|
#
|
2767 |
|
|
# This won't change for different subtargets so cache the result.
|
2768 |
|
|
|
2769 |
|
|
proc check_effective_target_vect_no_int_add { } {
|
2770 |
|
|
global et_vect_no_int_add_saved
|
2771 |
|
|
|
2772 |
|
|
if [info exists et_vect_no_int_add_saved] {
|
2773 |
|
|
verbose "check_effective_target_vect_no_int_add: using cached result" 2
|
2774 |
|
|
} else {
|
2775 |
|
|
set et_vect_no_int_add_saved 0
|
2776 |
|
|
# Alpha only supports vector add on V8QI and V4HI.
|
2777 |
|
|
if { [istarget alpha*-*-*] } {
|
2778 |
|
|
set et_vect_no_int_add_saved 1
|
2779 |
|
|
}
|
2780 |
|
|
}
|
2781 |
|
|
verbose "check_effective_target_vect_no_int_add: returning $et_vect_no_int_add_saved" 2
|
2782 |
|
|
return $et_vect_no_int_add_saved
|
2783 |
|
|
}
|
2784 |
|
|
|
2785 |
|
|
# Return 1 if the target plus current options does not support vector
|
2786 |
|
|
# bitwise instructions, 0 otherwise.
|
2787 |
|
|
#
|
2788 |
|
|
# This won't change for different subtargets so cache the result.
|
2789 |
|
|
|
2790 |
|
|
proc check_effective_target_vect_no_bitwise { } {
|
2791 |
|
|
global et_vect_no_bitwise_saved
|
2792 |
|
|
|
2793 |
|
|
if [info exists et_vect_no_bitwise_saved] {
|
2794 |
|
|
verbose "check_effective_target_vect_no_bitwise: using cached result" 2
|
2795 |
|
|
} else {
|
2796 |
|
|
set et_vect_no_bitwise_saved 0
|
2797 |
|
|
}
|
2798 |
|
|
verbose "check_effective_target_vect_no_bitwise: returning $et_vect_no_bitwise_saved" 2
|
2799 |
|
|
return $et_vect_no_bitwise_saved
|
2800 |
|
|
}
|
2801 |
|
|
|
2802 |
|
|
# Return 1 if the target plus current options supports vector permutation,
|
2803 |
|
|
# 0 otherwise.
|
2804 |
|
|
#
|
2805 |
|
|
# This won't change for different subtargets so cache the result.
|
2806 |
|
|
|
2807 |
|
|
proc check_effective_target_vect_perm { } {
|
2808 |
|
|
global et_vect_perm
|
2809 |
|
|
|
2810 |
|
|
if [info exists et_vect_perm_saved] {
|
2811 |
|
|
verbose "check_effective_target_vect_perm: using cached result" 2
|
2812 |
|
|
} else {
|
2813 |
|
|
set et_vect_perm_saved 0
|
2814 |
|
|
if { [is-effective-target arm_neon_ok]
|
2815 |
|
|
|| [istarget powerpc*-*-*]
|
2816 |
|
|
|| [istarget spu-*-*]
|
2817 |
|
|
|| [istarget i?86-*-*]
|
2818 |
|
|
|| [istarget x86_64-*-*]
|
2819 |
|
|
|| ([istarget mips*-*-*]
|
2820 |
|
|
&& [check_effective_target_mpaired_single]) } {
|
2821 |
|
|
set et_vect_perm_saved 1
|
2822 |
|
|
}
|
2823 |
|
|
}
|
2824 |
|
|
verbose "check_effective_target_vect_perm: returning $et_vect_perm_saved" 2
|
2825 |
|
|
return $et_vect_perm_saved
|
2826 |
|
|
}
|
2827 |
|
|
|
2828 |
|
|
# Return 1 if the target plus current options supports vector permutation
|
2829 |
|
|
# on byte-sized elements, 0 otherwise.
|
2830 |
|
|
#
|
2831 |
|
|
# This won't change for different subtargets so cache the result.
|
2832 |
|
|
|
2833 |
|
|
proc check_effective_target_vect_perm_byte { } {
|
2834 |
|
|
global et_vect_perm_byte
|
2835 |
|
|
|
2836 |
|
|
if [info exists et_vect_perm_byte_saved] {
|
2837 |
|
|
verbose "check_effective_target_vect_perm_byte: using cached result" 2
|
2838 |
|
|
} else {
|
2839 |
|
|
set et_vect_perm_byte_saved 0
|
2840 |
|
|
if { [is-effective-target arm_neon_ok]
|
2841 |
|
|
|| [istarget powerpc*-*-*]
|
2842 |
|
|
|| [istarget spu-*-*] } {
|
2843 |
|
|
set et_vect_perm_byte_saved 1
|
2844 |
|
|
}
|
2845 |
|
|
}
|
2846 |
|
|
verbose "check_effective_target_vect_perm_byte: returning $et_vect_perm_byte_saved" 2
|
2847 |
|
|
return $et_vect_perm_byte_saved
|
2848 |
|
|
}
|
2849 |
|
|
|
2850 |
|
|
# Return 1 if the target plus current options supports vector permutation
|
2851 |
|
|
# on short-sized elements, 0 otherwise.
|
2852 |
|
|
#
|
2853 |
|
|
# This won't change for different subtargets so cache the result.
|
2854 |
|
|
|
2855 |
|
|
proc check_effective_target_vect_perm_short { } {
|
2856 |
|
|
global et_vect_perm_short
|
2857 |
|
|
|
2858 |
|
|
if [info exists et_vect_perm_short_saved] {
|
2859 |
|
|
verbose "check_effective_target_vect_perm_short: using cached result" 2
|
2860 |
|
|
} else {
|
2861 |
|
|
set et_vect_perm_short_saved 0
|
2862 |
|
|
if { [is-effective-target arm_neon_ok]
|
2863 |
|
|
|| [istarget powerpc*-*-*]
|
2864 |
|
|
|| [istarget spu-*-*] } {
|
2865 |
|
|
set et_vect_perm_short_saved 1
|
2866 |
|
|
}
|
2867 |
|
|
}
|
2868 |
|
|
verbose "check_effective_target_vect_perm_short: returning $et_vect_perm_short_saved" 2
|
2869 |
|
|
return $et_vect_perm_short_saved
|
2870 |
|
|
}
|
2871 |
|
|
|
2872 |
|
|
# Return 1 if the target plus current options supports a vector
|
2873 |
|
|
# widening summation of *short* args into *int* result, 0 otherwise.
|
2874 |
|
|
#
|
2875 |
|
|
# This won't change for different subtargets so cache the result.
|
2876 |
|
|
|
2877 |
|
|
proc check_effective_target_vect_widen_sum_hi_to_si_pattern { } {
|
2878 |
|
|
global et_vect_widen_sum_hi_to_si_pattern
|
2879 |
|
|
|
2880 |
|
|
if [info exists et_vect_widen_sum_hi_to_si_pattern_saved] {
|
2881 |
|
|
verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern: using cached result" 2
|
2882 |
|
|
} else {
|
2883 |
|
|
set et_vect_widen_sum_hi_to_si_pattern_saved 0
|
2884 |
|
|
if { [istarget powerpc*-*-*]
|
2885 |
|
|
|| [istarget ia64-*-*] } {
|
2886 |
|
|
set et_vect_widen_sum_hi_to_si_pattern_saved 1
|
2887 |
|
|
}
|
2888 |
|
|
}
|
2889 |
|
|
verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern: returning $et_vect_widen_sum_hi_to_si_pattern_saved" 2
|
2890 |
|
|
return $et_vect_widen_sum_hi_to_si_pattern_saved
|
2891 |
|
|
}
|
2892 |
|
|
|
2893 |
|
|
# Return 1 if the target plus current options supports a vector
|
2894 |
|
|
# widening summation of *short* args into *int* result, 0 otherwise.
|
2895 |
|
|
# A target can also support this widening summation if it can support
|
2896 |
|
|
# promotion (unpacking) from shorts to ints.
|
2897 |
|
|
#
|
2898 |
|
|
# This won't change for different subtargets so cache the result.
|
2899 |
|
|
|
2900 |
|
|
proc check_effective_target_vect_widen_sum_hi_to_si { } {
|
2901 |
|
|
global et_vect_widen_sum_hi_to_si
|
2902 |
|
|
|
2903 |
|
|
if [info exists et_vect_widen_sum_hi_to_si_saved] {
|
2904 |
|
|
verbose "check_effective_target_vect_widen_sum_hi_to_si: using cached result" 2
|
2905 |
|
|
} else {
|
2906 |
|
|
set et_vect_widen_sum_hi_to_si_saved [check_effective_target_vect_unpack]
|
2907 |
|
|
if { [istarget powerpc*-*-*]
|
2908 |
|
|
|| [istarget ia64-*-*] } {
|
2909 |
|
|
set et_vect_widen_sum_hi_to_si_saved 1
|
2910 |
|
|
}
|
2911 |
|
|
}
|
2912 |
|
|
verbose "check_effective_target_vect_widen_sum_hi_to_si: returning $et_vect_widen_sum_hi_to_si_saved" 2
|
2913 |
|
|
return $et_vect_widen_sum_hi_to_si_saved
|
2914 |
|
|
}
|
2915 |
|
|
|
2916 |
|
|
# Return 1 if the target plus current options supports a vector
|
2917 |
|
|
# widening summation of *char* args into *short* result, 0 otherwise.
|
2918 |
|
|
# A target can also support this widening summation if it can support
|
2919 |
|
|
# promotion (unpacking) from chars to shorts.
|
2920 |
|
|
#
|
2921 |
|
|
# This won't change for different subtargets so cache the result.
|
2922 |
|
|
|
2923 |
|
|
proc check_effective_target_vect_widen_sum_qi_to_hi { } {
|
2924 |
|
|
global et_vect_widen_sum_qi_to_hi
|
2925 |
|
|
|
2926 |
|
|
if [info exists et_vect_widen_sum_qi_to_hi_saved] {
|
2927 |
|
|
verbose "check_effective_target_vect_widen_sum_qi_to_hi: using cached result" 2
|
2928 |
|
|
} else {
|
2929 |
|
|
set et_vect_widen_sum_qi_to_hi_saved 0
|
2930 |
|
|
if { [check_effective_target_vect_unpack]
|
2931 |
|
|
|| [istarget ia64-*-*] } {
|
2932 |
|
|
set et_vect_widen_sum_qi_to_hi_saved 1
|
2933 |
|
|
}
|
2934 |
|
|
}
|
2935 |
|
|
verbose "check_effective_target_vect_widen_sum_qi_to_hi: returning $et_vect_widen_sum_qi_to_hi_saved" 2
|
2936 |
|
|
return $et_vect_widen_sum_qi_to_hi_saved
|
2937 |
|
|
}
|
2938 |
|
|
|
2939 |
|
|
# Return 1 if the target plus current options supports a vector
|
2940 |
|
|
# widening summation of *char* args into *int* result, 0 otherwise.
|
2941 |
|
|
#
|
2942 |
|
|
# This won't change for different subtargets so cache the result.
|
2943 |
|
|
|
2944 |
|
|
proc check_effective_target_vect_widen_sum_qi_to_si { } {
|
2945 |
|
|
global et_vect_widen_sum_qi_to_si
|
2946 |
|
|
|
2947 |
|
|
if [info exists et_vect_widen_sum_qi_to_si_saved] {
|
2948 |
|
|
verbose "check_effective_target_vect_widen_sum_qi_to_si: using cached result" 2
|
2949 |
|
|
} else {
|
2950 |
|
|
set et_vect_widen_sum_qi_to_si_saved 0
|
2951 |
|
|
if { [istarget powerpc*-*-*] } {
|
2952 |
|
|
set et_vect_widen_sum_qi_to_si_saved 1
|
2953 |
|
|
}
|
2954 |
|
|
}
|
2955 |
|
|
verbose "check_effective_target_vect_widen_sum_qi_to_si: returning $et_vect_widen_sum_qi_to_si_saved" 2
|
2956 |
|
|
return $et_vect_widen_sum_qi_to_si_saved
|
2957 |
|
|
}
|
2958 |
|
|
|
2959 |
|
|
# Return 1 if the target plus current options supports a vector
|
2960 |
|
|
# widening multiplication of *char* args into *short* result, 0 otherwise.
|
2961 |
|
|
# A target can also support this widening multplication if it can support
|
2962 |
|
|
# promotion (unpacking) from chars to shorts, and vect_short_mult (non-widening
|
2963 |
|
|
# multiplication of shorts).
|
2964 |
|
|
#
|
2965 |
|
|
# This won't change for different subtargets so cache the result.
|
2966 |
|
|
|
2967 |
|
|
|
2968 |
|
|
proc check_effective_target_vect_widen_mult_qi_to_hi { } {
|
2969 |
|
|
global et_vect_widen_mult_qi_to_hi
|
2970 |
|
|
|
2971 |
|
|
if [info exists et_vect_widen_mult_qi_to_hi_saved] {
|
2972 |
|
|
verbose "check_effective_target_vect_widen_mult_qi_to_hi: using cached result" 2
|
2973 |
|
|
} else {
|
2974 |
|
|
if { [check_effective_target_vect_unpack]
|
2975 |
|
|
&& [check_effective_target_vect_short_mult] } {
|
2976 |
|
|
set et_vect_widen_mult_qi_to_hi_saved 1
|
2977 |
|
|
} else {
|
2978 |
|
|
set et_vect_widen_mult_qi_to_hi_saved 0
|
2979 |
|
|
}
|
2980 |
|
|
if { [istarget powerpc*-*-*]
|
2981 |
|
|
|| ([istarget arm*-*-*] && [check_effective_target_arm_neon]) } {
|
2982 |
|
|
set et_vect_widen_mult_qi_to_hi_saved 1
|
2983 |
|
|
}
|
2984 |
|
|
}
|
2985 |
|
|
verbose "check_effective_target_vect_widen_mult_qi_to_hi: returning $et_vect_widen_mult_qi_to_hi_saved" 2
|
2986 |
|
|
return $et_vect_widen_mult_qi_to_hi_saved
|
2987 |
|
|
}
|
2988 |
|
|
|
2989 |
|
|
# Return 1 if the target plus current options supports a vector
|
2990 |
|
|
# widening multiplication of *short* args into *int* result, 0 otherwise.
|
2991 |
|
|
# A target can also support this widening multplication if it can support
|
2992 |
|
|
# promotion (unpacking) from shorts to ints, and vect_int_mult (non-widening
|
2993 |
|
|
# multiplication of ints).
|
2994 |
|
|
#
|
2995 |
|
|
# This won't change for different subtargets so cache the result.
|
2996 |
|
|
|
2997 |
|
|
|
2998 |
|
|
proc check_effective_target_vect_widen_mult_hi_to_si { } {
|
2999 |
|
|
global et_vect_widen_mult_hi_to_si
|
3000 |
|
|
|
3001 |
|
|
if [info exists et_vect_widen_mult_hi_to_si_saved] {
|
3002 |
|
|
verbose "check_effective_target_vect_widen_mult_hi_to_si: using cached result" 2
|
3003 |
|
|
} else {
|
3004 |
|
|
if { [check_effective_target_vect_unpack]
|
3005 |
|
|
&& [check_effective_target_vect_int_mult] } {
|
3006 |
|
|
set et_vect_widen_mult_hi_to_si_saved 1
|
3007 |
|
|
} else {
|
3008 |
|
|
set et_vect_widen_mult_hi_to_si_saved 0
|
3009 |
|
|
}
|
3010 |
|
|
if { [istarget powerpc*-*-*]
|
3011 |
|
|
|| [istarget spu-*-*]
|
3012 |
|
|
|| [istarget ia64-*-*]
|
3013 |
|
|
|| [istarget i?86-*-*]
|
3014 |
|
|
|| [istarget x86_64-*-*]
|
3015 |
|
|
|| ([istarget arm*-*-*] && [check_effective_target_arm_neon]) } {
|
3016 |
|
|
set et_vect_widen_mult_hi_to_si_saved 1
|
3017 |
|
|
}
|
3018 |
|
|
}
|
3019 |
|
|
verbose "check_effective_target_vect_widen_mult_hi_to_si: returning $et_vect_widen_mult_hi_to_si_saved" 2
|
3020 |
|
|
return $et_vect_widen_mult_hi_to_si_saved
|
3021 |
|
|
}
|
3022 |
|
|
|
3023 |
|
|
# Return 1 if the target plus current options supports a vector
|
3024 |
|
|
# widening multiplication of *char* args into *short* result, 0 otherwise.
|
3025 |
|
|
#
|
3026 |
|
|
# This won't change for different subtargets so cache the result.
|
3027 |
|
|
|
3028 |
|
|
proc check_effective_target_vect_widen_mult_qi_to_hi_pattern { } {
|
3029 |
|
|
global et_vect_widen_mult_qi_to_hi_pattern
|
3030 |
|
|
|
3031 |
|
|
if [info exists et_vect_widen_mult_qi_to_hi_pattern_saved] {
|
3032 |
|
|
verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern: using cached result" 2
|
3033 |
|
|
} else {
|
3034 |
|
|
set et_vect_widen_mult_qi_to_hi_pattern_saved 0
|
3035 |
|
|
if { [istarget powerpc*-*-*]
|
3036 |
|
|
|| ([istarget arm*-*-*] && [check_effective_target_arm_neon]) } {
|
3037 |
|
|
set et_vect_widen_mult_qi_to_hi_pattern_saved 1
|
3038 |
|
|
}
|
3039 |
|
|
}
|
3040 |
|
|
verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern: returning $et_vect_widen_mult_qi_to_hi_pattern_saved" 2
|
3041 |
|
|
return $et_vect_widen_mult_qi_to_hi_pattern_saved
|
3042 |
|
|
}
|
3043 |
|
|
|
3044 |
|
|
# Return 1 if the target plus current options supports a vector
|
3045 |
|
|
# widening multiplication of *short* args into *int* result, 0 otherwise.
|
3046 |
|
|
#
|
3047 |
|
|
# This won't change for different subtargets so cache the result.
|
3048 |
|
|
|
3049 |
|
|
proc check_effective_target_vect_widen_mult_hi_to_si_pattern { } {
|
3050 |
|
|
global et_vect_widen_mult_hi_to_si_pattern
|
3051 |
|
|
|
3052 |
|
|
if [info exists et_vect_widen_mult_hi_to_si_pattern_saved] {
|
3053 |
|
|
verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern: using cached result" 2
|
3054 |
|
|
} else {
|
3055 |
|
|
set et_vect_widen_mult_hi_to_si_pattern_saved 0
|
3056 |
|
|
if { [istarget powerpc*-*-*]
|
3057 |
|
|
|| [istarget spu-*-*]
|
3058 |
|
|
|| [istarget ia64-*-*]
|
3059 |
|
|
|| [istarget i?86-*-*]
|
3060 |
|
|
|| [istarget x86_64-*-*]
|
3061 |
|
|
|| ([istarget arm*-*-*] && [check_effective_target_arm_neon]) } {
|
3062 |
|
|
set et_vect_widen_mult_hi_to_si_pattern_saved 1
|
3063 |
|
|
}
|
3064 |
|
|
}
|
3065 |
|
|
verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern: returning $et_vect_widen_mult_hi_to_si_pattern_saved" 2
|
3066 |
|
|
return $et_vect_widen_mult_hi_to_si_pattern_saved
|
3067 |
|
|
}
|
3068 |
|
|
|
3069 |
|
|
# Return 1 if the target plus current options supports a vector
|
3070 |
|
|
# widening shift, 0 otherwise.
|
3071 |
|
|
#
|
3072 |
|
|
# This won't change for different subtargets so cache the result.
|
3073 |
|
|
|
3074 |
|
|
proc check_effective_target_vect_widen_shift { } {
|
3075 |
|
|
global et_vect_widen_shift_saved
|
3076 |
|
|
|
3077 |
|
|
if [info exists et_vect_shift_saved] {
|
3078 |
|
|
verbose "check_effective_target_vect_widen_shift: using cached result" 2
|
3079 |
|
|
} else {
|
3080 |
|
|
set et_vect_widen_shift_saved 0
|
3081 |
|
|
if { ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
|
3082 |
|
|
set et_vect_widen_shift_saved 1
|
3083 |
|
|
}
|
3084 |
|
|
}
|
3085 |
|
|
verbose "check_effective_target_vect_widen_shift: returning $et_vect_widen_shift_saved" 2
|
3086 |
|
|
return $et_vect_widen_shift_saved
|
3087 |
|
|
}
|
3088 |
|
|
|
3089 |
|
|
# Return 1 if the target plus current options supports a vector
|
3090 |
|
|
# dot-product of signed chars, 0 otherwise.
|
3091 |
|
|
#
|
3092 |
|
|
# This won't change for different subtargets so cache the result.
|
3093 |
|
|
|
3094 |
|
|
proc check_effective_target_vect_sdot_qi { } {
|
3095 |
|
|
global et_vect_sdot_qi
|
3096 |
|
|
|
3097 |
|
|
if [info exists et_vect_sdot_qi_saved] {
|
3098 |
|
|
verbose "check_effective_target_vect_sdot_qi: using cached result" 2
|
3099 |
|
|
} else {
|
3100 |
|
|
set et_vect_sdot_qi_saved 0
|
3101 |
|
|
if { [istarget ia64-*-*] } {
|
3102 |
|
|
set et_vect_udot_qi_saved 1
|
3103 |
|
|
}
|
3104 |
|
|
}
|
3105 |
|
|
verbose "check_effective_target_vect_sdot_qi: returning $et_vect_sdot_qi_saved" 2
|
3106 |
|
|
return $et_vect_sdot_qi_saved
|
3107 |
|
|
}
|
3108 |
|
|
|
3109 |
|
|
# Return 1 if the target plus current options supports a vector
|
3110 |
|
|
# dot-product of unsigned chars, 0 otherwise.
|
3111 |
|
|
#
|
3112 |
|
|
# This won't change for different subtargets so cache the result.
|
3113 |
|
|
|
3114 |
|
|
proc check_effective_target_vect_udot_qi { } {
|
3115 |
|
|
global et_vect_udot_qi
|
3116 |
|
|
|
3117 |
|
|
if [info exists et_vect_udot_qi_saved] {
|
3118 |
|
|
verbose "check_effective_target_vect_udot_qi: using cached result" 2
|
3119 |
|
|
} else {
|
3120 |
|
|
set et_vect_udot_qi_saved 0
|
3121 |
|
|
if { [istarget powerpc*-*-*]
|
3122 |
|
|
|| [istarget ia64-*-*] } {
|
3123 |
|
|
set et_vect_udot_qi_saved 1
|
3124 |
|
|
}
|
3125 |
|
|
}
|
3126 |
|
|
verbose "check_effective_target_vect_udot_qi: returning $et_vect_udot_qi_saved" 2
|
3127 |
|
|
return $et_vect_udot_qi_saved
|
3128 |
|
|
}
|
3129 |
|
|
|
3130 |
|
|
# Return 1 if the target plus current options supports a vector
|
3131 |
|
|
# dot-product of signed shorts, 0 otherwise.
|
3132 |
|
|
#
|
3133 |
|
|
# This won't change for different subtargets so cache the result.
|
3134 |
|
|
|
3135 |
|
|
proc check_effective_target_vect_sdot_hi { } {
|
3136 |
|
|
global et_vect_sdot_hi
|
3137 |
|
|
|
3138 |
|
|
if [info exists et_vect_sdot_hi_saved] {
|
3139 |
|
|
verbose "check_effective_target_vect_sdot_hi: using cached result" 2
|
3140 |
|
|
} else {
|
3141 |
|
|
set et_vect_sdot_hi_saved 0
|
3142 |
|
|
if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
|
3143 |
|
|
|| [istarget ia64-*-*]
|
3144 |
|
|
|| [istarget i?86-*-*]
|
3145 |
|
|
|| [istarget x86_64-*-*] } {
|
3146 |
|
|
set et_vect_sdot_hi_saved 1
|
3147 |
|
|
}
|
3148 |
|
|
}
|
3149 |
|
|
verbose "check_effective_target_vect_sdot_hi: returning $et_vect_sdot_hi_saved" 2
|
3150 |
|
|
return $et_vect_sdot_hi_saved
|
3151 |
|
|
}
|
3152 |
|
|
|
3153 |
|
|
# Return 1 if the target plus current options supports a vector
|
3154 |
|
|
# dot-product of unsigned shorts, 0 otherwise.
|
3155 |
|
|
#
|
3156 |
|
|
# This won't change for different subtargets so cache the result.
|
3157 |
|
|
|
3158 |
|
|
proc check_effective_target_vect_udot_hi { } {
|
3159 |
|
|
global et_vect_udot_hi
|
3160 |
|
|
|
3161 |
|
|
if [info exists et_vect_udot_hi_saved] {
|
3162 |
|
|
verbose "check_effective_target_vect_udot_hi: using cached result" 2
|
3163 |
|
|
} else {
|
3164 |
|
|
set et_vect_udot_hi_saved 0
|
3165 |
|
|
if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*]) } {
|
3166 |
|
|
set et_vect_udot_hi_saved 1
|
3167 |
|
|
}
|
3168 |
|
|
}
|
3169 |
|
|
verbose "check_effective_target_vect_udot_hi: returning $et_vect_udot_hi_saved" 2
|
3170 |
|
|
return $et_vect_udot_hi_saved
|
3171 |
|
|
}
|
3172 |
|
|
|
3173 |
|
|
|
3174 |
|
|
# Return 1 if the target plus current options supports a vector
|
3175 |
|
|
# demotion (packing) of shorts (to chars) and ints (to shorts)
|
3176 |
|
|
# using modulo arithmetic, 0 otherwise.
|
3177 |
|
|
#
|
3178 |
|
|
# This won't change for different subtargets so cache the result.
|
3179 |
|
|
|
3180 |
|
|
proc check_effective_target_vect_pack_trunc { } {
|
3181 |
|
|
global et_vect_pack_trunc
|
3182 |
|
|
|
3183 |
|
|
if [info exists et_vect_pack_trunc_saved] {
|
3184 |
|
|
verbose "check_effective_target_vect_pack_trunc: using cached result" 2
|
3185 |
|
|
} else {
|
3186 |
|
|
set et_vect_pack_trunc_saved 0
|
3187 |
|
|
if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
|
3188 |
|
|
|| [istarget i?86-*-*]
|
3189 |
|
|
|| [istarget x86_64-*-*]
|
3190 |
|
|
|| [istarget spu-*-*]
|
3191 |
|
|
|| ([istarget arm*-*-*] && [check_effective_target_arm_neon]
|
3192 |
|
|
&& [check_effective_target_arm_little_endian]) } {
|
3193 |
|
|
set et_vect_pack_trunc_saved 1
|
3194 |
|
|
}
|
3195 |
|
|
}
|
3196 |
|
|
verbose "check_effective_target_vect_pack_trunc: returning $et_vect_pack_trunc_saved" 2
|
3197 |
|
|
return $et_vect_pack_trunc_saved
|
3198 |
|
|
}
|
3199 |
|
|
|
3200 |
|
|
# Return 1 if the target plus current options supports a vector
|
3201 |
|
|
# promotion (unpacking) of chars (to shorts) and shorts (to ints), 0 otherwise.
|
3202 |
|
|
#
|
3203 |
|
|
# This won't change for different subtargets so cache the result.
|
3204 |
|
|
|
3205 |
|
|
proc check_effective_target_vect_unpack { } {
|
3206 |
|
|
global et_vect_unpack
|
3207 |
|
|
|
3208 |
|
|
if [info exists et_vect_unpack_saved] {
|
3209 |
|
|
verbose "check_effective_target_vect_unpack: using cached result" 2
|
3210 |
|
|
} else {
|
3211 |
|
|
set et_vect_unpack_saved 0
|
3212 |
|
|
if { ([istarget powerpc*-*-*] && ![istarget powerpc-*paired*])
|
3213 |
|
|
|| [istarget i?86-*-*]
|
3214 |
|
|
|| [istarget x86_64-*-*]
|
3215 |
|
|
|| [istarget spu-*-*]
|
3216 |
|
|
|| [istarget ia64-*-*]
|
3217 |
|
|
|| ([istarget arm*-*-*] && [check_effective_target_arm_neon]
|
3218 |
|
|
&& [check_effective_target_arm_little_endian]) } {
|
3219 |
|
|
set et_vect_unpack_saved 1
|
3220 |
|
|
}
|
3221 |
|
|
}
|
3222 |
|
|
verbose "check_effective_target_vect_unpack: returning $et_vect_unpack_saved" 2
|
3223 |
|
|
return $et_vect_unpack_saved
|
3224 |
|
|
}
|
3225 |
|
|
|
3226 |
|
|
# Return 1 if the target plus current options does not guarantee
|
3227 |
|
|
# that its STACK_BOUNDARY is >= the reguired vector alignment.
|
3228 |
|
|
#
|
3229 |
|
|
# This won't change for different subtargets so cache the result.
|
3230 |
|
|
|
3231 |
|
|
proc check_effective_target_unaligned_stack { } {
|
3232 |
|
|
global et_unaligned_stack_saved
|
3233 |
|
|
|
3234 |
|
|
if [info exists et_unaligned_stack_saved] {
|
3235 |
|
|
verbose "check_effective_target_unaligned_stack: using cached result" 2
|
3236 |
|
|
} else {
|
3237 |
|
|
set et_unaligned_stack_saved 0
|
3238 |
|
|
}
|
3239 |
|
|
verbose "check_effective_target_unaligned_stack: returning $et_unaligned_stack_saved" 2
|
3240 |
|
|
return $et_unaligned_stack_saved
|
3241 |
|
|
}
|
3242 |
|
|
|
3243 |
|
|
# Return 1 if the target plus current options does not support a vector
|
3244 |
|
|
# alignment mechanism, 0 otherwise.
|
3245 |
|
|
#
|
3246 |
|
|
# This won't change for different subtargets so cache the result.
|
3247 |
|
|
|
3248 |
|
|
proc check_effective_target_vect_no_align { } {
|
3249 |
|
|
global et_vect_no_align_saved
|
3250 |
|
|
|
3251 |
|
|
if [info exists et_vect_no_align_saved] {
|
3252 |
|
|
verbose "check_effective_target_vect_no_align: using cached result" 2
|
3253 |
|
|
} else {
|
3254 |
|
|
set et_vect_no_align_saved 0
|
3255 |
|
|
if { [istarget mipsisa64*-*-*]
|
3256 |
|
|
|| [istarget sparc*-*-*]
|
3257 |
|
|
|| [istarget ia64-*-*]
|
3258 |
|
|
|| [check_effective_target_arm_vect_no_misalign]
|
3259 |
|
|
|| ([istarget mips*-*-*]
|
3260 |
|
|
&& [check_effective_target_mips_loongson]) } {
|
3261 |
|
|
set et_vect_no_align_saved 1
|
3262 |
|
|
}
|
3263 |
|
|
}
|
3264 |
|
|
verbose "check_effective_target_vect_no_align: returning $et_vect_no_align_saved" 2
|
3265 |
|
|
return $et_vect_no_align_saved
|
3266 |
|
|
}
|
3267 |
|
|
|
3268 |
|
|
# Return 1 if the target supports a vector misalign access, 0 otherwise.
|
3269 |
|
|
#
|
3270 |
|
|
# This won't change for different subtargets so cache the result.
|
3271 |
|
|
|
3272 |
|
|
proc check_effective_target_vect_hw_misalign { } {
|
3273 |
|
|
global et_vect_hw_misalign_saved
|
3274 |
|
|
|
3275 |
|
|
if [info exists et_vect_hw_misalign_saved] {
|
3276 |
|
|
verbose "check_effective_target_vect_hw_misalign: using cached result" 2
|
3277 |
|
|
} else {
|
3278 |
|
|
set et_vect_hw_misalign_saved 0
|
3279 |
|
|
if { ([istarget x86_64-*-*]
|
3280 |
|
|
|| [istarget i?86-*-*]) } {
|
3281 |
|
|
set et_vect_hw_misalign_saved 1
|
3282 |
|
|
}
|
3283 |
|
|
}
|
3284 |
|
|
verbose "check_effective_target_vect_hw_misalign: returning $et_vect_hw_misalign_saved" 2
|
3285 |
|
|
return $et_vect_hw_misalign_saved
|
3286 |
|
|
}
|
3287 |
|
|
|
3288 |
|
|
|
3289 |
|
|
# Return 1 if arrays are aligned to the vector alignment
|
3290 |
|
|
# boundary, 0 otherwise.
|
3291 |
|
|
#
|
3292 |
|
|
# This won't change for different subtargets so cache the result.
|
3293 |
|
|
|
3294 |
|
|
proc check_effective_target_vect_aligned_arrays { } {
|
3295 |
|
|
global et_vect_aligned_arrays
|
3296 |
|
|
|
3297 |
|
|
if [info exists et_vect_aligned_arrays_saved] {
|
3298 |
|
|
verbose "check_effective_target_vect_aligned_arrays: using cached result" 2
|
3299 |
|
|
} else {
|
3300 |
|
|
set et_vect_aligned_arrays_saved 0
|
3301 |
|
|
if { ([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
|
3302 |
|
|
if { ([is-effective-target lp64]
|
3303 |
|
|
&& ( ![check_avx_available]
|
3304 |
|
|
|| [check_prefer_avx128])) } {
|
3305 |
|
|
set et_vect_aligned_arrays_saved 1
|
3306 |
|
|
}
|
3307 |
|
|
}
|
3308 |
|
|
if [istarget spu-*-*] {
|
3309 |
|
|
set et_vect_aligned_arrays_saved 1
|
3310 |
|
|
}
|
3311 |
|
|
}
|
3312 |
|
|
verbose "check_effective_target_vect_aligned_arrays: returning $et_vect_aligned_arrays_saved" 2
|
3313 |
|
|
return $et_vect_aligned_arrays_saved
|
3314 |
|
|
}
|
3315 |
|
|
|
3316 |
|
|
# Return 1 if types of size 32 bit or less are naturally aligned
|
3317 |
|
|
# (aligned to their type-size), 0 otherwise.
|
3318 |
|
|
#
|
3319 |
|
|
# This won't change for different subtargets so cache the result.
|
3320 |
|
|
|
3321 |
|
|
proc check_effective_target_natural_alignment_32 { } {
|
3322 |
|
|
global et_natural_alignment_32
|
3323 |
|
|
|
3324 |
|
|
if [info exists et_natural_alignment_32_saved] {
|
3325 |
|
|
verbose "check_effective_target_natural_alignment_32: using cached result" 2
|
3326 |
|
|
} else {
|
3327 |
|
|
# FIXME: 32bit powerpc: guaranteed only if MASK_ALIGN_NATURAL/POWER.
|
3328 |
|
|
set et_natural_alignment_32_saved 1
|
3329 |
|
|
if { ([istarget *-*-darwin*] && [is-effective-target lp64]) } {
|
3330 |
|
|
set et_natural_alignment_32_saved 0
|
3331 |
|
|
}
|
3332 |
|
|
}
|
3333 |
|
|
verbose "check_effective_target_natural_alignment_32: returning $et_natural_alignment_32_saved" 2
|
3334 |
|
|
return $et_natural_alignment_32_saved
|
3335 |
|
|
}
|
3336 |
|
|
|
3337 |
|
|
# Return 1 if types of size 64 bit or less are naturally aligned (aligned to their
|
3338 |
|
|
# type-size), 0 otherwise.
|
3339 |
|
|
#
|
3340 |
|
|
# This won't change for different subtargets so cache the result.
|
3341 |
|
|
|
3342 |
|
|
proc check_effective_target_natural_alignment_64 { } {
|
3343 |
|
|
global et_natural_alignment_64
|
3344 |
|
|
|
3345 |
|
|
if [info exists et_natural_alignment_64_saved] {
|
3346 |
|
|
verbose "check_effective_target_natural_alignment_64: using cached result" 2
|
3347 |
|
|
} else {
|
3348 |
|
|
set et_natural_alignment_64_saved 0
|
3349 |
|
|
if { ([is-effective-target lp64] && ![istarget *-*-darwin*])
|
3350 |
|
|
|| [istarget spu-*-*] } {
|
3351 |
|
|
set et_natural_alignment_64_saved 1
|
3352 |
|
|
}
|
3353 |
|
|
}
|
3354 |
|
|
verbose "check_effective_target_natural_alignment_64: returning $et_natural_alignment_64_saved" 2
|
3355 |
|
|
return $et_natural_alignment_64_saved
|
3356 |
|
|
}
|
3357 |
|
|
|
3358 |
|
|
# Return 1 if vector alignment (for types of size 32 bit or less) is reachable, 0 otherwise.
|
3359 |
|
|
#
|
3360 |
|
|
# This won't change for different subtargets so cache the result.
|
3361 |
|
|
|
3362 |
|
|
proc check_effective_target_vector_alignment_reachable { } {
|
3363 |
|
|
global et_vector_alignment_reachable
|
3364 |
|
|
|
3365 |
|
|
if [info exists et_vector_alignment_reachable_saved] {
|
3366 |
|
|
verbose "check_effective_target_vector_alignment_reachable: using cached result" 2
|
3367 |
|
|
} else {
|
3368 |
|
|
if { [check_effective_target_vect_aligned_arrays]
|
3369 |
|
|
|| [check_effective_target_natural_alignment_32] } {
|
3370 |
|
|
set et_vector_alignment_reachable_saved 1
|
3371 |
|
|
} else {
|
3372 |
|
|
set et_vector_alignment_reachable_saved 0
|
3373 |
|
|
}
|
3374 |
|
|
}
|
3375 |
|
|
verbose "check_effective_target_vector_alignment_reachable: returning $et_vector_alignment_reachable_saved" 2
|
3376 |
|
|
return $et_vector_alignment_reachable_saved
|
3377 |
|
|
}
|
3378 |
|
|
|
3379 |
|
|
# Return 1 if vector alignment for 64 bit is reachable, 0 otherwise.
|
3380 |
|
|
#
|
3381 |
|
|
# This won't change for different subtargets so cache the result.
|
3382 |
|
|
|
3383 |
|
|
proc check_effective_target_vector_alignment_reachable_for_64bit { } {
|
3384 |
|
|
global et_vector_alignment_reachable_for_64bit
|
3385 |
|
|
|
3386 |
|
|
if [info exists et_vector_alignment_reachable_for_64bit_saved] {
|
3387 |
|
|
verbose "check_effective_target_vector_alignment_reachable_for_64bit: using cached result" 2
|
3388 |
|
|
} else {
|
3389 |
|
|
if { [check_effective_target_vect_aligned_arrays]
|
3390 |
|
|
|| [check_effective_target_natural_alignment_64] } {
|
3391 |
|
|
set et_vector_alignment_reachable_for_64bit_saved 1
|
3392 |
|
|
} else {
|
3393 |
|
|
set et_vector_alignment_reachable_for_64bit_saved 0
|
3394 |
|
|
}
|
3395 |
|
|
}
|
3396 |
|
|
verbose "check_effective_target_vector_alignment_reachable_for_64bit: returning $et_vector_alignment_reachable_for_64bit_saved" 2
|
3397 |
|
|
return $et_vector_alignment_reachable_for_64bit_saved
|
3398 |
|
|
}
|
3399 |
|
|
|
3400 |
|
|
# Return 1 if the target only requires element alignment for vector accesses
|
3401 |
|
|
|
3402 |
|
|
proc check_effective_target_vect_element_align { } {
|
3403 |
|
|
global et_vect_element_align
|
3404 |
|
|
|
3405 |
|
|
if [info exists et_vect_element_align] {
|
3406 |
|
|
verbose "check_effective_target_vect_element_align: using cached result" 2
|
3407 |
|
|
} else {
|
3408 |
|
|
set et_vect_element_align 0
|
3409 |
|
|
if { ([istarget arm*-*-*]
|
3410 |
|
|
&& ![check_effective_target_arm_vect_no_misalign])
|
3411 |
|
|
|| [check_effective_target_vect_hw_misalign] } {
|
3412 |
|
|
set et_vect_element_align 1
|
3413 |
|
|
}
|
3414 |
|
|
}
|
3415 |
|
|
|
3416 |
|
|
verbose "check_effective_target_vect_element_align: returning $et_vect_element_align" 2
|
3417 |
|
|
return $et_vect_element_align
|
3418 |
|
|
}
|
3419 |
|
|
|
3420 |
|
|
# Return 1 if the target supports vector conditional operations, 0 otherwise.
|
3421 |
|
|
|
3422 |
|
|
proc check_effective_target_vect_condition { } {
|
3423 |
|
|
global et_vect_cond_saved
|
3424 |
|
|
|
3425 |
|
|
if [info exists et_vect_cond_saved] {
|
3426 |
|
|
verbose "check_effective_target_vect_cond: using cached result" 2
|
3427 |
|
|
} else {
|
3428 |
|
|
set et_vect_cond_saved 0
|
3429 |
|
|
if { [istarget powerpc*-*-*]
|
3430 |
|
|
|| [istarget ia64-*-*]
|
3431 |
|
|
|| [istarget i?86-*-*]
|
3432 |
|
|
|| [istarget spu-*-*]
|
3433 |
|
|
|| [istarget x86_64-*-*]
|
3434 |
|
|
|| ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
|
3435 |
|
|
set et_vect_cond_saved 1
|
3436 |
|
|
}
|
3437 |
|
|
}
|
3438 |
|
|
|
3439 |
|
|
verbose "check_effective_target_vect_cond: returning $et_vect_cond_saved" 2
|
3440 |
|
|
return $et_vect_cond_saved
|
3441 |
|
|
}
|
3442 |
|
|
|
3443 |
|
|
# Return 1 if the target supports vector conditional operations where
|
3444 |
|
|
# the comparison has different type from the lhs, 0 otherwise.
|
3445 |
|
|
|
3446 |
|
|
proc check_effective_target_vect_cond_mixed { } {
|
3447 |
|
|
global et_vect_cond_mixed_saved
|
3448 |
|
|
|
3449 |
|
|
if [info exists et_vect_cond_mixed_saved] {
|
3450 |
|
|
verbose "check_effective_target_vect_cond_mixed: using cached result" 2
|
3451 |
|
|
} else {
|
3452 |
|
|
set et_vect_cond_mixed_saved 0
|
3453 |
|
|
if { [istarget i?86-*-*]
|
3454 |
|
|
|| [istarget x86_64-*-*]
|
3455 |
|
|
|| [istarget powerpc*-*-*] } {
|
3456 |
|
|
set et_vect_cond_mixed_saved 1
|
3457 |
|
|
}
|
3458 |
|
|
}
|
3459 |
|
|
|
3460 |
|
|
verbose "check_effective_target_vect_cond_mixed: returning $et_vect_cond_mixed_saved" 2
|
3461 |
|
|
return $et_vect_cond_mixed_saved
|
3462 |
|
|
}
|
3463 |
|
|
|
3464 |
|
|
# Return 1 if the target supports vector char multiplication, 0 otherwise.
|
3465 |
|
|
|
3466 |
|
|
proc check_effective_target_vect_char_mult { } {
|
3467 |
|
|
global et_vect_char_mult_saved
|
3468 |
|
|
|
3469 |
|
|
if [info exists et_vect_char_mult_saved] {
|
3470 |
|
|
verbose "check_effective_target_vect_char_mult: using cached result" 2
|
3471 |
|
|
} else {
|
3472 |
|
|
set et_vect_char_mult_saved 0
|
3473 |
|
|
if { [istarget ia64-*-*]
|
3474 |
|
|
|| [istarget i?86-*-*]
|
3475 |
|
|
|| [istarget x86_64-*-*] } {
|
3476 |
|
|
set et_vect_char_mult_saved 1
|
3477 |
|
|
}
|
3478 |
|
|
}
|
3479 |
|
|
|
3480 |
|
|
verbose "check_effective_target_vect_char_mult: returning $et_vect_char_mult_saved" 2
|
3481 |
|
|
return $et_vect_char_mult_saved
|
3482 |
|
|
}
|
3483 |
|
|
|
3484 |
|
|
# Return 1 if the target supports vector short multiplication, 0 otherwise.
|
3485 |
|
|
|
3486 |
|
|
proc check_effective_target_vect_short_mult { } {
|
3487 |
|
|
global et_vect_short_mult_saved
|
3488 |
|
|
|
3489 |
|
|
if [info exists et_vect_short_mult_saved] {
|
3490 |
|
|
verbose "check_effective_target_vect_short_mult: using cached result" 2
|
3491 |
|
|
} else {
|
3492 |
|
|
set et_vect_short_mult_saved 0
|
3493 |
|
|
if { [istarget ia64-*-*]
|
3494 |
|
|
|| [istarget spu-*-*]
|
3495 |
|
|
|| [istarget i?86-*-*]
|
3496 |
|
|
|| [istarget x86_64-*-*]
|
3497 |
|
|
|| [istarget powerpc*-*-*]
|
3498 |
|
|
|| [check_effective_target_arm32]
|
3499 |
|
|
|| ([istarget mips*-*-*]
|
3500 |
|
|
&& [check_effective_target_mips_loongson]) } {
|
3501 |
|
|
set et_vect_short_mult_saved 1
|
3502 |
|
|
}
|
3503 |
|
|
}
|
3504 |
|
|
|
3505 |
|
|
verbose "check_effective_target_vect_short_mult: returning $et_vect_short_mult_saved" 2
|
3506 |
|
|
return $et_vect_short_mult_saved
|
3507 |
|
|
}
|
3508 |
|
|
|
3509 |
|
|
# Return 1 if the target supports vector int multiplication, 0 otherwise.
|
3510 |
|
|
|
3511 |
|
|
proc check_effective_target_vect_int_mult { } {
|
3512 |
|
|
global et_vect_int_mult_saved
|
3513 |
|
|
|
3514 |
|
|
if [info exists et_vect_int_mult_saved] {
|
3515 |
|
|
verbose "check_effective_target_vect_int_mult: using cached result" 2
|
3516 |
|
|
} else {
|
3517 |
|
|
set et_vect_int_mult_saved 0
|
3518 |
|
|
if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
|
3519 |
|
|
|| [istarget spu-*-*]
|
3520 |
|
|
|| [istarget i?86-*-*]
|
3521 |
|
|
|| [istarget x86_64-*-*]
|
3522 |
|
|
|| [istarget ia64-*-*]
|
3523 |
|
|
|| [check_effective_target_arm32] } {
|
3524 |
|
|
set et_vect_int_mult_saved 1
|
3525 |
|
|
}
|
3526 |
|
|
}
|
3527 |
|
|
|
3528 |
|
|
verbose "check_effective_target_vect_int_mult: returning $et_vect_int_mult_saved" 2
|
3529 |
|
|
return $et_vect_int_mult_saved
|
3530 |
|
|
}
|
3531 |
|
|
|
3532 |
|
|
# Return 1 if the target supports vector even/odd elements extraction, 0 otherwise.
|
3533 |
|
|
|
3534 |
|
|
proc check_effective_target_vect_extract_even_odd { } {
|
3535 |
|
|
global et_vect_extract_even_odd_saved
|
3536 |
|
|
|
3537 |
|
|
if [info exists et_vect_extract_even_odd_saved] {
|
3538 |
|
|
verbose "check_effective_target_vect_extract_even_odd: using cached result" 2
|
3539 |
|
|
} else {
|
3540 |
|
|
set et_vect_extract_even_odd_saved 0
|
3541 |
|
|
if { [istarget powerpc*-*-*]
|
3542 |
|
|
|| [is-effective-target arm_neon_ok]
|
3543 |
|
|
|| [istarget i?86-*-*]
|
3544 |
|
|
|| [istarget x86_64-*-*]
|
3545 |
|
|
|| [istarget ia64-*-*]
|
3546 |
|
|
|| [istarget spu-*-*]
|
3547 |
|
|
|| ([istarget mips*-*-*]
|
3548 |
|
|
&& [check_effective_target_mpaired_single]) } {
|
3549 |
|
|
set et_vect_extract_even_odd_saved 1
|
3550 |
|
|
}
|
3551 |
|
|
}
|
3552 |
|
|
|
3553 |
|
|
verbose "check_effective_target_vect_extract_even_odd: returning $et_vect_extract_even_odd_saved" 2
|
3554 |
|
|
return $et_vect_extract_even_odd_saved
|
3555 |
|
|
}
|
3556 |
|
|
|
3557 |
|
|
# Return 1 if the target supports vector interleaving, 0 otherwise.
|
3558 |
|
|
|
3559 |
|
|
proc check_effective_target_vect_interleave { } {
|
3560 |
|
|
global et_vect_interleave_saved
|
3561 |
|
|
|
3562 |
|
|
if [info exists et_vect_interleave_saved] {
|
3563 |
|
|
verbose "check_effective_target_vect_interleave: using cached result" 2
|
3564 |
|
|
} else {
|
3565 |
|
|
set et_vect_interleave_saved 0
|
3566 |
|
|
if { [istarget powerpc*-*-*]
|
3567 |
|
|
|| [is-effective-target arm_neon_ok]
|
3568 |
|
|
|| [istarget i?86-*-*]
|
3569 |
|
|
|| [istarget x86_64-*-*]
|
3570 |
|
|
|| [istarget ia64-*-*]
|
3571 |
|
|
|| [istarget spu-*-*]
|
3572 |
|
|
|| ([istarget mips*-*-*]
|
3573 |
|
|
&& [check_effective_target_mpaired_single]) } {
|
3574 |
|
|
set et_vect_interleave_saved 1
|
3575 |
|
|
}
|
3576 |
|
|
}
|
3577 |
|
|
|
3578 |
|
|
verbose "check_effective_target_vect_interleave: returning $et_vect_interleave_saved" 2
|
3579 |
|
|
return $et_vect_interleave_saved
|
3580 |
|
|
}
|
3581 |
|
|
|
3582 |
|
|
foreach N {2 3 4 8} {
|
3583 |
|
|
eval [string map [list N $N] {
|
3584 |
|
|
# Return 1 if the target supports 2-vector interleaving
|
3585 |
|
|
proc check_effective_target_vect_stridedN { } {
|
3586 |
|
|
global et_vect_stridedN_saved
|
3587 |
|
|
|
3588 |
|
|
if [info exists et_vect_stridedN_saved] {
|
3589 |
|
|
verbose "check_effective_target_vect_stridedN: using cached result" 2
|
3590 |
|
|
} else {
|
3591 |
|
|
set et_vect_stridedN_saved 0
|
3592 |
|
|
if { (N & -N) == N
|
3593 |
|
|
&& [check_effective_target_vect_interleave]
|
3594 |
|
|
&& [check_effective_target_vect_extract_even_odd] } {
|
3595 |
|
|
set et_vect_stridedN_saved 1
|
3596 |
|
|
}
|
3597 |
|
|
if { [istarget arm*-*-*] && N >= 2 && N <= 4 } {
|
3598 |
|
|
set et_vect_stridedN_saved 1
|
3599 |
|
|
}
|
3600 |
|
|
}
|
3601 |
|
|
|
3602 |
|
|
verbose "check_effective_target_vect_stridedN: returning $et_vect_stridedN_saved" 2
|
3603 |
|
|
return $et_vect_stridedN_saved
|
3604 |
|
|
}
|
3605 |
|
|
}]
|
3606 |
|
|
}
|
3607 |
|
|
|
3608 |
|
|
# Return 1 if the target supports multiple vector sizes
|
3609 |
|
|
|
3610 |
|
|
proc check_effective_target_vect_multiple_sizes { } {
|
3611 |
|
|
global et_vect_multiple_sizes_saved
|
3612 |
|
|
|
3613 |
|
|
set et_vect_multiple_sizes_saved 0
|
3614 |
|
|
if { ([istarget arm*-*-*] && [check_effective_target_arm_neon]) } {
|
3615 |
|
|
set et_vect_multiple_sizes_saved 1
|
3616 |
|
|
}
|
3617 |
|
|
if { ([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
|
3618 |
|
|
if { ([check_avx_available] && ![check_prefer_avx128]) } {
|
3619 |
|
|
set et_vect_multiple_sizes_saved 1
|
3620 |
|
|
}
|
3621 |
|
|
}
|
3622 |
|
|
|
3623 |
|
|
verbose "check_effective_target_vect_multiple_sizes: returning $et_vect_multiple_sizes_saved" 2
|
3624 |
|
|
return $et_vect_multiple_sizes_saved
|
3625 |
|
|
}
|
3626 |
|
|
|
3627 |
|
|
# Return 1 if the target supports vectors of 64 bits.
|
3628 |
|
|
|
3629 |
|
|
proc check_effective_target_vect64 { } {
|
3630 |
|
|
global et_vect64_saved
|
3631 |
|
|
|
3632 |
|
|
if [info exists et_vect64_saved] {
|
3633 |
|
|
verbose "check_effective_target_vect64: using cached result" 2
|
3634 |
|
|
} else {
|
3635 |
|
|
set et_vect64_saved 0
|
3636 |
|
|
if { ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
|
3637 |
|
|
set et_vect64_saved 1
|
3638 |
|
|
}
|
3639 |
|
|
}
|
3640 |
|
|
|
3641 |
|
|
verbose "check_effective_target_vect64: returning $et_vect64_saved" 2
|
3642 |
|
|
return $et_vect64_saved
|
3643 |
|
|
}
|
3644 |
|
|
|
3645 |
|
|
# Return 1 if the target supports vector copysignf calls.
|
3646 |
|
|
|
3647 |
|
|
proc check_effective_target_vect_call_copysignf { } {
|
3648 |
|
|
global et_vect_call_copysignf_saved
|
3649 |
|
|
|
3650 |
|
|
if [info exists et_vect_call_copysignf_saved] {
|
3651 |
|
|
verbose "check_effective_target_vect_call_copysignf: using cached result" 2
|
3652 |
|
|
} else {
|
3653 |
|
|
set et_vect_call_copysignf_saved 0
|
3654 |
|
|
if { [istarget i?86-*-*]
|
3655 |
|
|
|| [istarget x86_64-*-*]
|
3656 |
|
|
|| [istarget powerpc*-*-*] } {
|
3657 |
|
|
set et_vect_call_copysignf_saved 1
|
3658 |
|
|
}
|
3659 |
|
|
}
|
3660 |
|
|
|
3661 |
|
|
verbose "check_effective_target_vect_call_copysignf: returning $et_vect_call_copysignf_saved" 2
|
3662 |
|
|
return $et_vect_call_copysignf_saved
|
3663 |
|
|
}
|
3664 |
|
|
|
3665 |
|
|
# Return 1 if the target supports vector sqrtf calls.
|
3666 |
|
|
|
3667 |
|
|
proc check_effective_target_vect_call_sqrtf { } {
|
3668 |
|
|
global et_vect_call_sqrtf_saved
|
3669 |
|
|
|
3670 |
|
|
if [info exists et_vect_call_sqrtf_saved] {
|
3671 |
|
|
verbose "check_effective_target_vect_call_sqrtf: using cached result" 2
|
3672 |
|
|
} else {
|
3673 |
|
|
set et_vect_call_sqrtf_saved 0
|
3674 |
|
|
if { [istarget i?86-*-*]
|
3675 |
|
|
|| [istarget x86_64-*-*]
|
3676 |
|
|
|| ([istarget powerpc*-*-*] && [check_vsx_hw_available]) } {
|
3677 |
|
|
set et_vect_call_sqrtf_saved 1
|
3678 |
|
|
}
|
3679 |
|
|
}
|
3680 |
|
|
|
3681 |
|
|
verbose "check_effective_target_vect_call_sqrtf: returning $et_vect_call_sqrtf_saved" 2
|
3682 |
|
|
return $et_vect_call_sqrtf_saved
|
3683 |
|
|
}
|
3684 |
|
|
|
3685 |
|
|
# Return 1 if the target supports vector lrint calls.
|
3686 |
|
|
|
3687 |
|
|
proc check_effective_target_vect_call_lrint { } {
|
3688 |
|
|
set et_vect_call_lrint 0
|
3689 |
|
|
if { ([istarget i?86-*-*] || [istarget x86_64-*-*]) && [check_effective_target_ilp32] } {
|
3690 |
|
|
set et_vect_call_lrint 1
|
3691 |
|
|
}
|
3692 |
|
|
|
3693 |
|
|
verbose "check_effective_target_vect_call_lrint: returning $et_vect_call_lrint" 2
|
3694 |
|
|
return $et_vect_call_lrint
|
3695 |
|
|
}
|
3696 |
|
|
|
3697 |
|
|
# Return 1 if the target supports section-anchors
|
3698 |
|
|
|
3699 |
|
|
proc check_effective_target_section_anchors { } {
|
3700 |
|
|
global et_section_anchors_saved
|
3701 |
|
|
|
3702 |
|
|
if [info exists et_section_anchors_saved] {
|
3703 |
|
|
verbose "check_effective_target_section_anchors: using cached result" 2
|
3704 |
|
|
} else {
|
3705 |
|
|
set et_section_anchors_saved 0
|
3706 |
|
|
if { [istarget powerpc*-*-*]
|
3707 |
|
|
|| [istarget arm*-*-*] } {
|
3708 |
|
|
set et_section_anchors_saved 1
|
3709 |
|
|
}
|
3710 |
|
|
}
|
3711 |
|
|
|
3712 |
|
|
verbose "check_effective_target_section_anchors: returning $et_section_anchors_saved" 2
|
3713 |
|
|
return $et_section_anchors_saved
|
3714 |
|
|
}
|
3715 |
|
|
|
3716 |
|
|
# Return 1 if the target supports atomic operations on "int_128" values.
|
3717 |
|
|
|
3718 |
|
|
proc check_effective_target_sync_int_128 { } {
|
3719 |
|
|
if { ([istarget x86_64-*-*] || [istarget i?86-*-*])
|
3720 |
|
|
&& ![is-effective-target ia32] } {
|
3721 |
|
|
return 1
|
3722 |
|
|
} else {
|
3723 |
|
|
return 0
|
3724 |
|
|
}
|
3725 |
|
|
}
|
3726 |
|
|
|
3727 |
|
|
# Return 1 if the target supports atomic operations on "int_128" values
|
3728 |
|
|
# and can execute them.
|
3729 |
|
|
|
3730 |
|
|
proc check_effective_target_sync_int_128_runtime { } {
|
3731 |
|
|
if { ([istarget x86_64-*-*] || [istarget i?86-*-*])
|
3732 |
|
|
&& ![is-effective-target ia32] } {
|
3733 |
|
|
return [check_cached_effective_target sync_int_128_available {
|
3734 |
|
|
check_runtime_nocache sync_int_128_available {
|
3735 |
|
|
#include "cpuid.h"
|
3736 |
|
|
int main ()
|
3737 |
|
|
{
|
3738 |
|
|
unsigned int eax, ebx, ecx, edx;
|
3739 |
|
|
if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
|
3740 |
|
|
return !(ecx & bit_CMPXCHG16B);
|
3741 |
|
|
return 1;
|
3742 |
|
|
}
|
3743 |
|
|
} ""
|
3744 |
|
|
}]
|
3745 |
|
|
} else {
|
3746 |
|
|
return 0
|
3747 |
|
|
}
|
3748 |
|
|
}
|
3749 |
|
|
|
3750 |
|
|
# Return 1 if the target supports atomic operations on "long long".
|
3751 |
|
|
#
|
3752 |
|
|
# Note: 32bit x86 targets require -march=pentium in dg-options.
|
3753 |
|
|
|
3754 |
|
|
proc check_effective_target_sync_long_long { } {
|
3755 |
|
|
if { [istarget x86_64-*-*]
|
3756 |
|
|
|| [istarget i?86-*-*])
|
3757 |
|
|
|| [istarget arm*-*-*]
|
3758 |
|
|
|| [istarget alpha*-*-*] } {
|
3759 |
|
|
return 1
|
3760 |
|
|
} else {
|
3761 |
|
|
return 0
|
3762 |
|
|
}
|
3763 |
|
|
}
|
3764 |
|
|
|
3765 |
|
|
# Return 1 if the target supports atomic operations on "long long"
|
3766 |
|
|
# and can execute them.
|
3767 |
|
|
#
|
3768 |
|
|
# Note: 32bit x86 targets require -march=pentium in dg-options.
|
3769 |
|
|
|
3770 |
|
|
proc check_effective_target_sync_long_long_runtime { } {
|
3771 |
|
|
if { [istarget x86_64-*-*]
|
3772 |
|
|
|| [istarget i?86-*-*] } {
|
3773 |
|
|
return [check_cached_effective_target sync_long_long_available {
|
3774 |
|
|
check_runtime_nocache sync_long_long_available {
|
3775 |
|
|
#include "cpuid.h"
|
3776 |
|
|
int main ()
|
3777 |
|
|
{
|
3778 |
|
|
unsigned int eax, ebx, ecx, edx;
|
3779 |
|
|
if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
|
3780 |
|
|
return !(edx & bit_CMPXCHG8B);
|
3781 |
|
|
return 1;
|
3782 |
|
|
}
|
3783 |
|
|
} ""
|
3784 |
|
|
}]
|
3785 |
|
|
} elseif { [istarget arm*-*-linux-gnueabi] } {
|
3786 |
|
|
return [check_runtime sync_longlong_runtime {
|
3787 |
|
|
#include
|
3788 |
|
|
int main ()
|
3789 |
|
|
{
|
3790 |
|
|
long long l1;
|
3791 |
|
|
|
3792 |
|
|
if (sizeof (long long) != 8)
|
3793 |
|
|
exit (1);
|
3794 |
|
|
|
3795 |
|
|
/* Just check for native; checking for kernel fallback is tricky. */
|
3796 |
|
|
asm volatile ("ldrexd r0,r1, [%0]" : : "r" (&l1) : "r0", "r1");
|
3797 |
|
|
|
3798 |
|
|
exit (0);
|
3799 |
|
|
}
|
3800 |
|
|
} "" ]
|
3801 |
|
|
} elseif { [istarget alpha*-*-*] } {
|
3802 |
|
|
return 1
|
3803 |
|
|
} else {
|
3804 |
|
|
return 0
|
3805 |
|
|
}
|
3806 |
|
|
}
|
3807 |
|
|
|
3808 |
|
|
# Return 1 if the target supports atomic operations on "int" and "long".
|
3809 |
|
|
|
3810 |
|
|
proc check_effective_target_sync_int_long { } {
|
3811 |
|
|
global et_sync_int_long_saved
|
3812 |
|
|
|
3813 |
|
|
if [info exists et_sync_int_long_saved] {
|
3814 |
|
|
verbose "check_effective_target_sync_int_long: using cached result" 2
|
3815 |
|
|
} else {
|
3816 |
|
|
set et_sync_int_long_saved 0
|
3817 |
|
|
# This is intentionally powerpc but not rs6000, rs6000 doesn't have the
|
3818 |
|
|
# load-reserved/store-conditional instructions.
|
3819 |
|
|
if { [istarget ia64-*-*]
|
3820 |
|
|
|| [istarget i?86-*-*]
|
3821 |
|
|
|| [istarget x86_64-*-*]
|
3822 |
|
|
|| [istarget alpha*-*-*]
|
3823 |
|
|
|| [istarget arm*-*-linux-gnueabi]
|
3824 |
|
|
|| [istarget bfin*-*linux*]
|
3825 |
|
|
|| [istarget hppa*-*linux*]
|
3826 |
|
|
|| [istarget s390*-*-*]
|
3827 |
|
|
|| [istarget powerpc*-*-*]
|
3828 |
|
|
|| [istarget sparc64-*-*]
|
3829 |
|
|
|| [istarget sparcv9-*-*]
|
3830 |
|
|
|| [check_effective_target_mips_llsc] } {
|
3831 |
|
|
set et_sync_int_long_saved 1
|
3832 |
|
|
}
|
3833 |
|
|
}
|
3834 |
|
|
|
3835 |
|
|
verbose "check_effective_target_sync_int_long: returning $et_sync_int_long_saved" 2
|
3836 |
|
|
return $et_sync_int_long_saved
|
3837 |
|
|
}
|
3838 |
|
|
|
3839 |
|
|
# Return 1 if the target supports atomic operations on "char" and "short".
|
3840 |
|
|
|
3841 |
|
|
proc check_effective_target_sync_char_short { } {
|
3842 |
|
|
global et_sync_char_short_saved
|
3843 |
|
|
|
3844 |
|
|
if [info exists et_sync_char_short_saved] {
|
3845 |
|
|
verbose "check_effective_target_sync_char_short: using cached result" 2
|
3846 |
|
|
} else {
|
3847 |
|
|
set et_sync_char_short_saved 0
|
3848 |
|
|
# This is intentionally powerpc but not rs6000, rs6000 doesn't have the
|
3849 |
|
|
# load-reserved/store-conditional instructions.
|
3850 |
|
|
if { [istarget ia64-*-*]
|
3851 |
|
|
|| [istarget i?86-*-*]
|
3852 |
|
|
|| [istarget x86_64-*-*]
|
3853 |
|
|
|| [istarget alpha*-*-*]
|
3854 |
|
|
|| [istarget arm*-*-linux-gnueabi]
|
3855 |
|
|
|| [istarget hppa*-*linux*]
|
3856 |
|
|
|| [istarget s390*-*-*]
|
3857 |
|
|
|| [istarget powerpc*-*-*]
|
3858 |
|
|
|| [istarget sparc64-*-*]
|
3859 |
|
|
|| [istarget sparcv9-*-*]
|
3860 |
|
|
|| [check_effective_target_mips_llsc] } {
|
3861 |
|
|
set et_sync_char_short_saved 1
|
3862 |
|
|
}
|
3863 |
|
|
}
|
3864 |
|
|
|
3865 |
|
|
verbose "check_effective_target_sync_char_short: returning $et_sync_char_short_saved" 2
|
3866 |
|
|
return $et_sync_char_short_saved
|
3867 |
|
|
}
|
3868 |
|
|
|
3869 |
|
|
# Return 1 if the target uses a ColdFire FPU.
|
3870 |
|
|
|
3871 |
|
|
proc check_effective_target_coldfire_fpu { } {
|
3872 |
|
|
return [check_no_compiler_messages coldfire_fpu assembly {
|
3873 |
|
|
#ifndef __mcffpu__
|
3874 |
|
|
#error FOO
|
3875 |
|
|
#endif
|
3876 |
|
|
}]
|
3877 |
|
|
}
|
3878 |
|
|
|
3879 |
|
|
# Return true if this is a uClibc target.
|
3880 |
|
|
|
3881 |
|
|
proc check_effective_target_uclibc {} {
|
3882 |
|
|
return [check_no_compiler_messages uclibc object {
|
3883 |
|
|
#include
|
3884 |
|
|
#if !defined (__UCLIBC__)
|
3885 |
|
|
#error FOO
|
3886 |
|
|
#endif
|
3887 |
|
|
}]
|
3888 |
|
|
}
|
3889 |
|
|
|
3890 |
|
|
# Return true if this is a uclibc target and if the uclibc feature
|
3891 |
|
|
# described by __$feature__ is not present.
|
3892 |
|
|
|
3893 |
|
|
proc check_missing_uclibc_feature {feature} {
|
3894 |
|
|
return [check_no_compiler_messages $feature object "
|
3895 |
|
|
#include
|
3896 |
|
|
#if !defined (__UCLIBC) || defined (__${feature}__)
|
3897 |
|
|
#error FOO
|
3898 |
|
|
#endif
|
3899 |
|
|
"]
|
3900 |
|
|
}
|
3901 |
|
|
|
3902 |
|
|
# Return true if this is a Newlib target.
|
3903 |
|
|
|
3904 |
|
|
proc check_effective_target_newlib {} {
|
3905 |
|
|
return [check_no_compiler_messages newlib object {
|
3906 |
|
|
#include
|
3907 |
|
|
}]
|
3908 |
|
|
}
|
3909 |
|
|
|
3910 |
|
|
# Return 1 if
|
3911 |
|
|
# (a) an error of a few ULP is expected in string to floating-point
|
3912 |
|
|
# conversion functions; and
|
3913 |
|
|
# (b) overflow is not always detected correctly by those functions.
|
3914 |
|
|
|
3915 |
|
|
proc check_effective_target_lax_strtofp {} {
|
3916 |
|
|
# By default, assume that all uClibc targets suffer from this.
|
3917 |
|
|
return [check_effective_target_uclibc]
|
3918 |
|
|
}
|
3919 |
|
|
|
3920 |
|
|
# Return 1 if this is a target for which wcsftime is a dummy
|
3921 |
|
|
# function that always returns 0.
|
3922 |
|
|
|
3923 |
|
|
proc check_effective_target_dummy_wcsftime {} {
|
3924 |
|
|
# By default, assume that all uClibc targets suffer from this.
|
3925 |
|
|
return [check_effective_target_uclibc]
|
3926 |
|
|
}
|
3927 |
|
|
|
3928 |
|
|
# Return 1 if constructors with initialization priority arguments are
|
3929 |
|
|
# supposed on this target.
|
3930 |
|
|
|
3931 |
|
|
proc check_effective_target_init_priority {} {
|
3932 |
|
|
return [check_no_compiler_messages init_priority assembly "
|
3933 |
|
|
void f() __attribute__((constructor (1000)));
|
3934 |
|
|
void f() \{\}
|
3935 |
|
|
"]
|
3936 |
|
|
}
|
3937 |
|
|
|
3938 |
|
|
# Return 1 if the target matches the effective target 'arg', 0 otherwise.
|
3939 |
|
|
# This can be used with any check_* proc that takes no argument and
|
3940 |
|
|
# returns only 1 or 0. It could be used with check_* procs that take
|
3941 |
|
|
# arguments with keywords that pass particular arguments.
|
3942 |
|
|
|
3943 |
|
|
proc is-effective-target { arg } {
|
3944 |
|
|
set selected 0
|
3945 |
|
|
if { [info procs check_effective_target_${arg}] != [list] } {
|
3946 |
|
|
set selected [check_effective_target_${arg}]
|
3947 |
|
|
} else {
|
3948 |
|
|
switch $arg {
|
3949 |
|
|
"vmx_hw" { set selected [check_vmx_hw_available] }
|
3950 |
|
|
"vsx_hw" { set selected [check_vsx_hw_available] }
|
3951 |
|
|
"ppc_recip_hw" { set selected [check_ppc_recip_hw_available] }
|
3952 |
|
|
"named_sections" { set selected [check_named_sections_available] }
|
3953 |
|
|
"gc_sections" { set selected [check_gc_sections_available] }
|
3954 |
|
|
"cxa_atexit" { set selected [check_cxa_atexit_available] }
|
3955 |
|
|
default { error "unknown effective target keyword `$arg'" }
|
3956 |
|
|
}
|
3957 |
|
|
}
|
3958 |
|
|
verbose "is-effective-target: $arg $selected" 2
|
3959 |
|
|
return $selected
|
3960 |
|
|
}
|
3961 |
|
|
|
3962 |
|
|
# Return 1 if the argument is an effective-target keyword, 0 otherwise.
|
3963 |
|
|
|
3964 |
|
|
proc is-effective-target-keyword { arg } {
|
3965 |
|
|
if { [info procs check_effective_target_${arg}] != [list] } {
|
3966 |
|
|
return 1
|
3967 |
|
|
} else {
|
3968 |
|
|
# These have different names for their check_* procs.
|
3969 |
|
|
switch $arg {
|
3970 |
|
|
"vmx_hw" { return 1 }
|
3971 |
|
|
"vsx_hw" { return 1 }
|
3972 |
|
|
"ppc_recip_hw" { return 1 }
|
3973 |
|
|
"named_sections" { return 1 }
|
3974 |
|
|
"gc_sections" { return 1 }
|
3975 |
|
|
"cxa_atexit" { return 1 }
|
3976 |
|
|
default { return 0 }
|
3977 |
|
|
}
|
3978 |
|
|
}
|
3979 |
|
|
}
|
3980 |
|
|
|
3981 |
|
|
# Return 1 if target default to short enums
|
3982 |
|
|
|
3983 |
|
|
proc check_effective_target_short_enums { } {
|
3984 |
|
|
return [check_no_compiler_messages short_enums assembly {
|
3985 |
|
|
enum foo { bar };
|
3986 |
|
|
int s[sizeof (enum foo) == 1 ? 1 : -1];
|
3987 |
|
|
}]
|
3988 |
|
|
}
|
3989 |
|
|
|
3990 |
|
|
# Return 1 if target supports merging string constants at link time.
|
3991 |
|
|
|
3992 |
|
|
proc check_effective_target_string_merging { } {
|
3993 |
|
|
return [check_no_messages_and_pattern string_merging \
|
3994 |
|
|
"rodata\\.str" assembly {
|
3995 |
|
|
const char *var = "String";
|
3996 |
|
|
} {-O2}]
|
3997 |
|
|
}
|
3998 |
|
|
|
3999 |
|
|
# Return 1 if target has the basic signed and unsigned types in
|
4000 |
|
|
# , 0 otherwise. This will be obsolete when GCC ensures a
|
4001 |
|
|
# working for all targets.
|
4002 |
|
|
|
4003 |
|
|
proc check_effective_target_stdint_types { } {
|
4004 |
|
|
return [check_no_compiler_messages stdint_types assembly {
|
4005 |
|
|
#include
|
4006 |
|
|
int8_t a; int16_t b; int32_t c; int64_t d;
|
4007 |
|
|
uint8_t e; uint16_t f; uint32_t g; uint64_t h;
|
4008 |
|
|
}]
|
4009 |
|
|
}
|
4010 |
|
|
|
4011 |
|
|
# Return 1 if target has the basic signed and unsigned types in
|
4012 |
|
|
# , 0 otherwise. This is for tests that GCC's notions of
|
4013 |
|
|
# these types agree with those in the header, as some systems have
|
4014 |
|
|
# only .
|
4015 |
|
|
|
4016 |
|
|
proc check_effective_target_inttypes_types { } {
|
4017 |
|
|
return [check_no_compiler_messages inttypes_types assembly {
|
4018 |
|
|
#include
|
4019 |
|
|
int8_t a; int16_t b; int32_t c; int64_t d;
|
4020 |
|
|
uint8_t e; uint16_t f; uint32_t g; uint64_t h;
|
4021 |
|
|
}]
|
4022 |
|
|
}
|
4023 |
|
|
|
4024 |
|
|
# Return 1 if programs are intended to be run on a simulator
|
4025 |
|
|
# (i.e. slowly) rather than hardware (i.e. fast).
|
4026 |
|
|
|
4027 |
|
|
proc check_effective_target_simulator { } {
|
4028 |
|
|
|
4029 |
|
|
# All "src/sim" simulators set this one.
|
4030 |
|
|
if [board_info target exists is_simulator] {
|
4031 |
|
|
return [board_info target is_simulator]
|
4032 |
|
|
}
|
4033 |
|
|
|
4034 |
|
|
# The "sid" simulators don't set that one, but at least they set
|
4035 |
|
|
# this one.
|
4036 |
|
|
if [board_info target exists slow_simulator] {
|
4037 |
|
|
return [board_info target slow_simulator]
|
4038 |
|
|
}
|
4039 |
|
|
|
4040 |
|
|
return 0
|
4041 |
|
|
}
|
4042 |
|
|
|
4043 |
|
|
# Return 1 if the target is a VxWorks kernel.
|
4044 |
|
|
|
4045 |
|
|
proc check_effective_target_vxworks_kernel { } {
|
4046 |
|
|
return [check_no_compiler_messages vxworks_kernel assembly {
|
4047 |
|
|
#if !defined __vxworks || defined __RTP__
|
4048 |
|
|
#error NO
|
4049 |
|
|
#endif
|
4050 |
|
|
}]
|
4051 |
|
|
}
|
4052 |
|
|
|
4053 |
|
|
# Return 1 if the target is a VxWorks RTP.
|
4054 |
|
|
|
4055 |
|
|
proc check_effective_target_vxworks_rtp { } {
|
4056 |
|
|
return [check_no_compiler_messages vxworks_rtp assembly {
|
4057 |
|
|
#if !defined __vxworks || !defined __RTP__
|
4058 |
|
|
#error NO
|
4059 |
|
|
#endif
|
4060 |
|
|
}]
|
4061 |
|
|
}
|
4062 |
|
|
|
4063 |
|
|
# Return 1 if the target is expected to provide wide character support.
|
4064 |
|
|
|
4065 |
|
|
proc check_effective_target_wchar { } {
|
4066 |
|
|
if {[check_missing_uclibc_feature UCLIBC_HAS_WCHAR]} {
|
4067 |
|
|
return 0
|
4068 |
|
|
}
|
4069 |
|
|
return [check_no_compiler_messages wchar assembly {
|
4070 |
|
|
#include
|
4071 |
|
|
}]
|
4072 |
|
|
}
|
4073 |
|
|
|
4074 |
|
|
# Return 1 if the target has .
|
4075 |
|
|
|
4076 |
|
|
proc check_effective_target_pthread_h { } {
|
4077 |
|
|
return [check_no_compiler_messages pthread_h assembly {
|
4078 |
|
|
#include
|
4079 |
|
|
}]
|
4080 |
|
|
}
|
4081 |
|
|
|
4082 |
|
|
# Return 1 if the target can truncate a file from a file-descriptor,
|
4083 |
|
|
# as used by libgfortran/io/unix.c:fd_truncate; i.e. ftruncate or
|
4084 |
|
|
# chsize. We test for a trivially functional truncation; no stubs.
|
4085 |
|
|
# As libgfortran uses _FILE_OFFSET_BITS 64, we do too; it'll cause a
|
4086 |
|
|
# different function to be used.
|
4087 |
|
|
|
4088 |
|
|
proc check_effective_target_fd_truncate { } {
|
4089 |
|
|
set prog {
|
4090 |
|
|
#define _FILE_OFFSET_BITS 64
|
4091 |
|
|
#include
|
4092 |
|
|
#include
|
4093 |
|
|
#include
|
4094 |
|
|
int main ()
|
4095 |
|
|
{
|
4096 |
|
|
FILE *f = fopen ("tst.tmp", "wb");
|
4097 |
|
|
int fd;
|
4098 |
|
|
const char t[] = "test writing more than ten characters";
|
4099 |
|
|
char s[11];
|
4100 |
|
|
int status = 0;
|
4101 |
|
|
fd = fileno (f);
|
4102 |
|
|
write (fd, t, sizeof (t) - 1);
|
4103 |
|
|
lseek (fd, 0, 0);
|
4104 |
|
|
if (ftruncate (fd, 10) != 0)
|
4105 |
|
|
status = 1;
|
4106 |
|
|
close (fd);
|
4107 |
|
|
fclose (f);
|
4108 |
|
|
if (status)
|
4109 |
|
|
{
|
4110 |
|
|
unlink ("tst.tmp");
|
4111 |
|
|
exit (status);
|
4112 |
|
|
}
|
4113 |
|
|
f = fopen ("tst.tmp", "rb");
|
4114 |
|
|
if (fread (s, 1, sizeof (s), f) != 10 || strncmp (s, t, 10) != 0)
|
4115 |
|
|
status = 1;
|
4116 |
|
|
fclose (f);
|
4117 |
|
|
unlink ("tst.tmp");
|
4118 |
|
|
exit (status);
|
4119 |
|
|
}
|
4120 |
|
|
}
|
4121 |
|
|
|
4122 |
|
|
if { [check_runtime ftruncate $prog] } {
|
4123 |
|
|
return 1;
|
4124 |
|
|
}
|
4125 |
|
|
|
4126 |
|
|
regsub "ftruncate" $prog "chsize" prog
|
4127 |
|
|
return [check_runtime chsize $prog]
|
4128 |
|
|
}
|
4129 |
|
|
|
4130 |
|
|
# Add to FLAGS all the target-specific flags needed to access the c99 runtime.
|
4131 |
|
|
|
4132 |
|
|
proc add_options_for_c99_runtime { flags } {
|
4133 |
|
|
if { [istarget *-*-solaris2*] } {
|
4134 |
|
|
return "$flags -std=c99"
|
4135 |
|
|
}
|
4136 |
|
|
if { [istarget mips-sgi-irix6.5*] } {
|
4137 |
|
|
return "$flags -std=c99"
|
4138 |
|
|
}
|
4139 |
|
|
if { [istarget powerpc-*-darwin*] } {
|
4140 |
|
|
return "$flags -mmacosx-version-min=10.3"
|
4141 |
|
|
}
|
4142 |
|
|
return $flags
|
4143 |
|
|
}
|
4144 |
|
|
|
4145 |
|
|
# Add to FLAGS all the target-specific flags needed to enable
|
4146 |
|
|
# full IEEE compliance mode.
|
4147 |
|
|
|
4148 |
|
|
proc add_options_for_ieee { flags } {
|
4149 |
|
|
if { [istarget alpha*-*-*]
|
4150 |
|
|
|| [istarget sh*-*-*] } {
|
4151 |
|
|
return "$flags -mieee"
|
4152 |
|
|
}
|
4153 |
|
|
if { [istarget rx-*-*] } {
|
4154 |
|
|
return "$flags -mnofpu"
|
4155 |
|
|
}
|
4156 |
|
|
return $flags
|
4157 |
|
|
}
|
4158 |
|
|
|
4159 |
|
|
# Add to FLAGS the flags needed to enable functions to bind locally
|
4160 |
|
|
# when using pic/PIC passes in the testsuite.
|
4161 |
|
|
|
4162 |
|
|
proc add_options_for_bind_pic_locally { flags } {
|
4163 |
|
|
if {[check_no_compiler_messages using_pic2 assembly {
|
4164 |
|
|
#if __PIC__ != 2
|
4165 |
|
|
#error FOO
|
4166 |
|
|
#endif
|
4167 |
|
|
}]} {
|
4168 |
|
|
return "$flags -fPIE"
|
4169 |
|
|
}
|
4170 |
|
|
if {[check_no_compiler_messages using_pic1 assembly {
|
4171 |
|
|
#if __PIC__ != 1
|
4172 |
|
|
#error FOO
|
4173 |
|
|
#endif
|
4174 |
|
|
}]} {
|
4175 |
|
|
return "$flags -fpie"
|
4176 |
|
|
}
|
4177 |
|
|
|
4178 |
|
|
return $flags
|
4179 |
|
|
}
|
4180 |
|
|
|
4181 |
|
|
# Add to FLAGS the flags needed to enable 64-bit vectors.
|
4182 |
|
|
|
4183 |
|
|
proc add_options_for_double_vectors { flags } {
|
4184 |
|
|
if [is-effective-target arm_neon_ok] {
|
4185 |
|
|
return "$flags -mvectorize-with-neon-double"
|
4186 |
|
|
}
|
4187 |
|
|
|
4188 |
|
|
return $flags
|
4189 |
|
|
}
|
4190 |
|
|
|
4191 |
|
|
# Return 1 if the target provides a full C99 runtime.
|
4192 |
|
|
|
4193 |
|
|
proc check_effective_target_c99_runtime { } {
|
4194 |
|
|
return [check_cached_effective_target c99_runtime {
|
4195 |
|
|
global srcdir
|
4196 |
|
|
|
4197 |
|
|
set file [open "$srcdir/gcc.dg/builtins-config.h"]
|
4198 |
|
|
set contents [read $file]
|
4199 |
|
|
close $file
|
4200 |
|
|
append contents {
|
4201 |
|
|
#ifndef HAVE_C99_RUNTIME
|
4202 |
|
|
#error FOO
|
4203 |
|
|
#endif
|
4204 |
|
|
}
|
4205 |
|
|
check_no_compiler_messages_nocache c99_runtime assembly \
|
4206 |
|
|
$contents [add_options_for_c99_runtime ""]
|
4207 |
|
|
}]
|
4208 |
|
|
}
|
4209 |
|
|
|
4210 |
|
|
# Return 1 if target wchar_t is at least 4 bytes.
|
4211 |
|
|
|
4212 |
|
|
proc check_effective_target_4byte_wchar_t { } {
|
4213 |
|
|
return [check_no_compiler_messages 4byte_wchar_t object {
|
4214 |
|
|
int dummy[sizeof (__WCHAR_TYPE__) >= 4 ? 1 : -1];
|
4215 |
|
|
}]
|
4216 |
|
|
}
|
4217 |
|
|
|
4218 |
|
|
# Return 1 if the target supports automatic stack alignment.
|
4219 |
|
|
|
4220 |
|
|
proc check_effective_target_automatic_stack_alignment { } {
|
4221 |
|
|
# Ordinarily x86 supports automatic stack alignment ...
|
4222 |
|
|
if { [istarget i?86*-*-*] || [istarget x86_64-*-*] } then {
|
4223 |
|
|
if { [istarget *-*-mingw*] || [istarget *-*-cygwin*] } {
|
4224 |
|
|
# ... except Win64 SEH doesn't. Succeed for Win32 though.
|
4225 |
|
|
return [check_effective_target_ilp32];
|
4226 |
|
|
}
|
4227 |
|
|
return 1;
|
4228 |
|
|
}
|
4229 |
|
|
return 0;
|
4230 |
|
|
}
|
4231 |
|
|
|
4232 |
|
|
# Return true if we are compiling for AVX target.
|
4233 |
|
|
|
4234 |
|
|
proc check_avx_available { } {
|
4235 |
|
|
if { [check_no_compiler_messages avx_available assembly {
|
4236 |
|
|
#ifndef __AVX__
|
4237 |
|
|
#error unsupported
|
4238 |
|
|
#endif
|
4239 |
|
|
} ""] } {
|
4240 |
|
|
return 1;
|
4241 |
|
|
}
|
4242 |
|
|
return 0;
|
4243 |
|
|
}
|
4244 |
|
|
|
4245 |
|
|
# Return true if 32- and 16-bytes vectors are available.
|
4246 |
|
|
|
4247 |
|
|
proc check_effective_target_vect_sizes_32B_16B { } {
|
4248 |
|
|
return [check_avx_available];
|
4249 |
|
|
}
|
4250 |
|
|
|
4251 |
|
|
# Return true if 128-bits vectors are preferred even if 256-bits vectors
|
4252 |
|
|
# are available.
|
4253 |
|
|
|
4254 |
|
|
proc check_prefer_avx128 { } {
|
4255 |
|
|
if ![check_avx_available] {
|
4256 |
|
|
return 0;
|
4257 |
|
|
}
|
4258 |
|
|
return [check_no_messages_and_pattern avx_explicit "xmm" assembly {
|
4259 |
|
|
float a[1024],b[1024],c[1024];
|
4260 |
|
|
void foo (void) { int i; for (i = 0; i < 1024; i++) a[i]=b[i]+c[i];}
|
4261 |
|
|
} "-O2 -ftree-vectorize"]
|
4262 |
|
|
}
|
4263 |
|
|
|
4264 |
|
|
|
4265 |
|
|
# Return 1 if avx instructions can be compiled.
|
4266 |
|
|
|
4267 |
|
|
proc check_effective_target_avx { } {
|
4268 |
|
|
return [check_no_compiler_messages avx object {
|
4269 |
|
|
void _mm256_zeroall (void)
|
4270 |
|
|
{
|
4271 |
|
|
__builtin_ia32_vzeroall ();
|
4272 |
|
|
}
|
4273 |
|
|
} "-O2 -mavx" ]
|
4274 |
|
|
}
|
4275 |
|
|
|
4276 |
|
|
# Return 1 if sse instructions can be compiled.
|
4277 |
|
|
proc check_effective_target_sse { } {
|
4278 |
|
|
return [check_no_compiler_messages sse object {
|
4279 |
|
|
int main ()
|
4280 |
|
|
{
|
4281 |
|
|
__builtin_ia32_stmxcsr ();
|
4282 |
|
|
return 0;
|
4283 |
|
|
}
|
4284 |
|
|
} "-O2 -msse" ]
|
4285 |
|
|
}
|
4286 |
|
|
|
4287 |
|
|
# Return 1 if sse2 instructions can be compiled.
|
4288 |
|
|
proc check_effective_target_sse2 { } {
|
4289 |
|
|
return [check_no_compiler_messages sse2 object {
|
4290 |
|
|
typedef long long __m128i __attribute__ ((__vector_size__ (16)));
|
4291 |
|
|
|
4292 |
|
|
__m128i _mm_srli_si128 (__m128i __A, int __N)
|
4293 |
|
|
{
|
4294 |
|
|
return (__m128i)__builtin_ia32_psrldqi128 (__A, 8);
|
4295 |
|
|
}
|
4296 |
|
|
} "-O2 -msse2" ]
|
4297 |
|
|
}
|
4298 |
|
|
|
4299 |
|
|
# Return 1 if F16C instructions can be compiled.
|
4300 |
|
|
|
4301 |
|
|
proc check_effective_target_f16c { } {
|
4302 |
|
|
return [check_no_compiler_messages f16c object {
|
4303 |
|
|
#include "immintrin.h"
|
4304 |
|
|
float
|
4305 |
|
|
foo (unsigned short val)
|
4306 |
|
|
{
|
4307 |
|
|
return _cvtsh_ss (val);
|
4308 |
|
|
}
|
4309 |
|
|
} "-O2 -mf16c" ]
|
4310 |
|
|
}
|
4311 |
|
|
|
4312 |
|
|
# Return 1 if C wchar_t type is compatible with char16_t.
|
4313 |
|
|
|
4314 |
|
|
proc check_effective_target_wchar_t_char16_t_compatible { } {
|
4315 |
|
|
return [check_no_compiler_messages wchar_t_char16_t object {
|
4316 |
|
|
__WCHAR_TYPE__ wc;
|
4317 |
|
|
__CHAR16_TYPE__ *p16 = &wc;
|
4318 |
|
|
char t[(((__CHAR16_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
|
4319 |
|
|
}]
|
4320 |
|
|
}
|
4321 |
|
|
|
4322 |
|
|
# Return 1 if C wchar_t type is compatible with char32_t.
|
4323 |
|
|
|
4324 |
|
|
proc check_effective_target_wchar_t_char32_t_compatible { } {
|
4325 |
|
|
return [check_no_compiler_messages wchar_t_char32_t object {
|
4326 |
|
|
__WCHAR_TYPE__ wc;
|
4327 |
|
|
__CHAR32_TYPE__ *p32 = &wc;
|
4328 |
|
|
char t[(((__CHAR32_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
|
4329 |
|
|
}]
|
4330 |
|
|
}
|
4331 |
|
|
|
4332 |
|
|
# Return 1 if pow10 function exists.
|
4333 |
|
|
|
4334 |
|
|
proc check_effective_target_pow10 { } {
|
4335 |
|
|
return [check_runtime pow10 {
|
4336 |
|
|
#include
|
4337 |
|
|
int main () {
|
4338 |
|
|
double x;
|
4339 |
|
|
x = pow10 (1);
|
4340 |
|
|
return 0;
|
4341 |
|
|
}
|
4342 |
|
|
} "-lm" ]
|
4343 |
|
|
}
|
4344 |
|
|
|
4345 |
|
|
# Return 1 if current options generate DFP instructions, 0 otherwise.
|
4346 |
|
|
|
4347 |
|
|
proc check_effective_target_hard_dfp {} {
|
4348 |
|
|
return [check_no_messages_and_pattern hard_dfp "!adddd3" assembly {
|
4349 |
|
|
typedef float d64 __attribute__((mode(DD)));
|
4350 |
|
|
d64 x, y, z;
|
4351 |
|
|
void foo (void) { z = x + y; }
|
4352 |
|
|
}]
|
4353 |
|
|
}
|
4354 |
|
|
|
4355 |
|
|
# Return 1 if string.h and wchar.h headers provide C++ requires overloads
|
4356 |
|
|
# for strchr etc. functions.
|
4357 |
|
|
|
4358 |
|
|
proc check_effective_target_correct_iso_cpp_string_wchar_protos { } {
|
4359 |
|
|
return [check_no_compiler_messages correct_iso_cpp_string_wchar_protos assembly {
|
4360 |
|
|
#include
|
4361 |
|
|
#include
|
4362 |
|
|
#if !defined(__cplusplus) \
|
4363 |
|
|
|| !defined(__CORRECT_ISO_CPP_STRING_H_PROTO) \
|
4364 |
|
|
|| !defined(__CORRECT_ISO_CPP_WCHAR_H_PROTO)
|
4365 |
|
|
ISO C++ correct string.h and wchar.h protos not supported.
|
4366 |
|
|
#else
|
4367 |
|
|
int i;
|
4368 |
|
|
#endif
|
4369 |
|
|
}]
|
4370 |
|
|
}
|
4371 |
|
|
|
4372 |
|
|
# Return 1 if GNU as is used.
|
4373 |
|
|
|
4374 |
|
|
proc check_effective_target_gas { } {
|
4375 |
|
|
global use_gas_saved
|
4376 |
|
|
global tool
|
4377 |
|
|
|
4378 |
|
|
if {![info exists use_gas_saved]} {
|
4379 |
|
|
# Check if the as used by gcc is GNU as.
|
4380 |
|
|
set gcc_as [lindex [${tool}_target_compile "-print-prog-name=as" "" "none" ""] 0]
|
4381 |
|
|
# Provide /dev/null as input, otherwise gas times out reading from
|
4382 |
|
|
# stdin.
|
4383 |
|
|
set status [remote_exec host "$gcc_as" "-v /dev/null"]
|
4384 |
|
|
set as_output [lindex $status 1]
|
4385 |
|
|
if { [ string first "GNU" $as_output ] >= 0 } {
|
4386 |
|
|
set use_gas_saved 1
|
4387 |
|
|
} else {
|
4388 |
|
|
set use_gas_saved 0
|
4389 |
|
|
}
|
4390 |
|
|
}
|
4391 |
|
|
return $use_gas_saved
|
4392 |
|
|
}
|
4393 |
|
|
|
4394 |
|
|
# Return 1 if GNU ld is used.
|
4395 |
|
|
|
4396 |
|
|
proc check_effective_target_gld { } {
|
4397 |
|
|
global use_gld_saved
|
4398 |
|
|
global tool
|
4399 |
|
|
|
4400 |
|
|
if {![info exists use_gld_saved]} {
|
4401 |
|
|
# Check if the ld used by gcc is GNU ld.
|
4402 |
|
|
set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=ld" "" "none" ""] 0]
|
4403 |
|
|
set status [remote_exec host "$gcc_ld" "--version"]
|
4404 |
|
|
set ld_output [lindex $status 1]
|
4405 |
|
|
if { [ string first "GNU" $ld_output ] >= 0 } {
|
4406 |
|
|
set use_gld_saved 1
|
4407 |
|
|
} else {
|
4408 |
|
|
set use_gld_saved 0
|
4409 |
|
|
}
|
4410 |
|
|
}
|
4411 |
|
|
return $use_gld_saved
|
4412 |
|
|
}
|
4413 |
|
|
|
4414 |
|
|
# Return 1 if the compiler has been configure with link-time optimization
|
4415 |
|
|
# (LTO) support.
|
4416 |
|
|
|
4417 |
|
|
proc check_effective_target_lto { } {
|
4418 |
|
|
global ENABLE_LTO
|
4419 |
|
|
return [info exists ENABLE_LTO]
|
4420 |
|
|
}
|
4421 |
|
|
|
4422 |
|
|
# Return 1 if this target supports the -fsplit-stack option, 0
|
4423 |
|
|
# otherwise.
|
4424 |
|
|
|
4425 |
|
|
proc check_effective_target_split_stack {} {
|
4426 |
|
|
return [check_no_compiler_messages split_stack object {
|
4427 |
|
|
void foo (void) { }
|
4428 |
|
|
} "-fsplit-stack"]
|
4429 |
|
|
}
|
4430 |
|
|
|
4431 |
|
|
# Return 1 if the language for the compiler under test is C.
|
4432 |
|
|
|
4433 |
|
|
proc check_effective_target_c { } {
|
4434 |
|
|
global tool
|
4435 |
|
|
if [string match $tool "gcc"] {
|
4436 |
|
|
return 1
|
4437 |
|
|
}
|
4438 |
|
|
return 0
|
4439 |
|
|
}
|
4440 |
|
|
|
4441 |
|
|
# Return 1 if the language for the compiler under test is C++.
|
4442 |
|
|
|
4443 |
|
|
proc check_effective_target_c++ { } {
|
4444 |
|
|
global tool
|
4445 |
|
|
if [string match $tool "g++"] {
|
4446 |
|
|
return 1
|
4447 |
|
|
}
|
4448 |
|
|
return 0
|
4449 |
|
|
}
|
4450 |
|
|
|
4451 |
|
|
# Check which language standard is active by checking for the presence of
|
4452 |
|
|
# one of the C++11 -std flags. This assumes that the default for the
|
4453 |
|
|
# compiler is C++98, and that there will never be multiple -std= arguments
|
4454 |
|
|
# on the command line.
|
4455 |
|
|
proc check_effective_target_c++11 { } {
|
4456 |
|
|
if ![check_effective_target_c++] {
|
4457 |
|
|
return 0
|
4458 |
|
|
}
|
4459 |
|
|
return [check-flags { { } { } { -std=c++0x -std=gnu++0x -std=c++11 -std=gnu++11 } }]
|
4460 |
|
|
}
|
4461 |
|
|
|
4462 |
|
|
proc check_effective_target_c++98 { } {
|
4463 |
|
|
if ![check_effective_target_c++] {
|
4464 |
|
|
return 0
|
4465 |
|
|
}
|
4466 |
|
|
return [check-flags { { } { } { } { -std=c++0x -std=gnu++0x -std=c++11 -std=gnu++11 } }]
|
4467 |
|
|
}
|
4468 |
|
|
|
4469 |
|
|
# Return 1 if expensive testcases should be run.
|
4470 |
|
|
|
4471 |
|
|
proc check_effective_target_run_expensive_tests { } {
|
4472 |
|
|
if { [getenv GCC_TEST_RUN_EXPENSIVE] != "" } {
|
4473 |
|
|
return 1
|
4474 |
|
|
}
|
4475 |
|
|
return 0
|
4476 |
|
|
}
|
4477 |
|
|
|
4478 |
|
|
# Returns 1 if "mempcpy" is available on the target system.
|
4479 |
|
|
|
4480 |
|
|
proc check_effective_target_mempcpy {} {
|
4481 |
|
|
return [check_function_available "mempcpy"]
|
4482 |
|
|
}
|
4483 |
|
|
|
4484 |
|
|
# Check whether the vectorizer tests are supported by the target and
|
4485 |
|
|
# append additional target-dependent compile flags to DEFAULT_VECTCFLAGS.
|
4486 |
|
|
# Set dg-do-what-default to either compile or run, depending on target
|
4487 |
|
|
# capabilities. Return 1 if vectorizer tests are supported by
|
4488 |
|
|
# target, 0 otherwise.
|
4489 |
|
|
|
4490 |
|
|
proc check_vect_support_and_set_flags { } {
|
4491 |
|
|
global DEFAULT_VECTCFLAGS
|
4492 |
|
|
global dg-do-what-default
|
4493 |
|
|
|
4494 |
|
|
if [istarget powerpc-*paired*] {
|
4495 |
|
|
lappend DEFAULT_VECTCFLAGS "-mpaired"
|
4496 |
|
|
if [check_750cl_hw_available] {
|
4497 |
|
|
set dg-do-what-default run
|
4498 |
|
|
} else {
|
4499 |
|
|
set dg-do-what-default compile
|
4500 |
|
|
}
|
4501 |
|
|
} elseif [istarget powerpc*-*-*] {
|
4502 |
|
|
# Skip targets not supporting -maltivec.
|
4503 |
|
|
if ![is-effective-target powerpc_altivec_ok] {
|
4504 |
|
|
return 0
|
4505 |
|
|
}
|
4506 |
|
|
|
4507 |
|
|
lappend DEFAULT_VECTCFLAGS "-maltivec"
|
4508 |
|
|
if [check_vsx_hw_available] {
|
4509 |
|
|
lappend DEFAULT_VECTCFLAGS "-mvsx" "-mno-allow-movmisalign"
|
4510 |
|
|
}
|
4511 |
|
|
|
4512 |
|
|
if [check_vmx_hw_available] {
|
4513 |
|
|
set dg-do-what-default run
|
4514 |
|
|
} else {
|
4515 |
|
|
if [is-effective-target ilp32] {
|
4516 |
|
|
# Specify a cpu that supports VMX for compile-only tests.
|
4517 |
|
|
lappend DEFAULT_VECTCFLAGS "-mcpu=970"
|
4518 |
|
|
}
|
4519 |
|
|
set dg-do-what-default compile
|
4520 |
|
|
}
|
4521 |
|
|
} elseif { [istarget spu-*-*] } {
|
4522 |
|
|
set dg-do-what-default run
|
4523 |
|
|
} elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
|
4524 |
|
|
lappend DEFAULT_VECTCFLAGS "-msse2"
|
4525 |
|
|
if { [check_effective_target_sse2_runtime] } {
|
4526 |
|
|
set dg-do-what-default run
|
4527 |
|
|
} else {
|
4528 |
|
|
set dg-do-what-default compile
|
4529 |
|
|
}
|
4530 |
|
|
} elseif { [istarget mips*-*-*]
|
4531 |
|
|
&& ([check_effective_target_mpaired_single]
|
4532 |
|
|
|| [check_effective_target_mips_loongson])
|
4533 |
|
|
&& [check_effective_target_nomips16] } {
|
4534 |
|
|
if { [check_effective_target_mpaired_single] } {
|
4535 |
|
|
lappend DEFAULT_VECTCFLAGS "-mpaired-single"
|
4536 |
|
|
}
|
4537 |
|
|
set dg-do-what-default run
|
4538 |
|
|
} elseif [istarget sparc*-*-*] {
|
4539 |
|
|
lappend DEFAULT_VECTCFLAGS "-mcpu=ultrasparc" "-mvis"
|
4540 |
|
|
if [check_effective_target_ultrasparc_hw] {
|
4541 |
|
|
set dg-do-what-default run
|
4542 |
|
|
} else {
|
4543 |
|
|
set dg-do-what-default compile
|
4544 |
|
|
}
|
4545 |
|
|
} elseif [istarget alpha*-*-*] {
|
4546 |
|
|
# Alpha's vectorization capabilities are extremely limited.
|
4547 |
|
|
# It's more effort than its worth disabling all of the tests
|
4548 |
|
|
# that it cannot pass. But if you actually want to see what
|
4549 |
|
|
# does work, command out the return.
|
4550 |
|
|
return 0
|
4551 |
|
|
|
4552 |
|
|
lappend DEFAULT_VECTCFLAGS "-mmax"
|
4553 |
|
|
if [check_alpha_max_hw_available] {
|
4554 |
|
|
set dg-do-what-default run
|
4555 |
|
|
} else {
|
4556 |
|
|
set dg-do-what-default compile
|
4557 |
|
|
}
|
4558 |
|
|
} elseif [istarget ia64-*-*] {
|
4559 |
|
|
set dg-do-what-default run
|
4560 |
|
|
} elseif [is-effective-target arm_neon_ok] {
|
4561 |
|
|
eval lappend DEFAULT_VECTCFLAGS [add_options_for_arm_neon ""]
|
4562 |
|
|
# NEON does not support denormals, so is not used for vectorization by
|
4563 |
|
|
# default to avoid loss of precision. We must pass -ffast-math to test
|
4564 |
|
|
# vectorization of float operations.
|
4565 |
|
|
lappend DEFAULT_VECTCFLAGS "-ffast-math"
|
4566 |
|
|
if [is-effective-target arm_neon_hw] {
|
4567 |
|
|
set dg-do-what-default run
|
4568 |
|
|
} else {
|
4569 |
|
|
set dg-do-what-default compile
|
4570 |
|
|
}
|
4571 |
|
|
} else {
|
4572 |
|
|
return 0
|
4573 |
|
|
}
|
4574 |
|
|
|
4575 |
|
|
return 1
|
4576 |
|
|
}
|
4577 |
|
|
|
4578 |
|
|
proc check_effective_target_non_strict_align {} {
|
4579 |
|
|
return [check_no_compiler_messages non_strict_align assembly {
|
4580 |
|
|
char *y;
|
4581 |
|
|
typedef char __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))) c;
|
4582 |
|
|
c *z;
|
4583 |
|
|
void foo(void) { z = (c *) y; }
|
4584 |
|
|
} "-Wcast-align"]
|
4585 |
|
|
}
|
4586 |
|
|
|
4587 |
|
|
# Return 1 if the target has .
|
4588 |
|
|
|
4589 |
|
|
proc check_effective_target_ucontext_h { } {
|
4590 |
|
|
return [check_no_compiler_messages ucontext_h assembly {
|
4591 |
|
|
#include
|
4592 |
|
|
}]
|
4593 |
|
|
}
|