OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [gnu-dev/] [or1k-gcc/] [libffi/] [src/] [powerpc/] [aix.S] - Blame information for rev 735

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 732 jeremybenn
/* -----------------------------------------------------------------------
2
   aix.S - Copyright (c) 2002,2009 Free Software Foundation, Inc.
3
   based on darwin.S by John Hornkvist
4
 
5
   PowerPC Assembly glue.
6
 
7
   Permission is hereby granted, free of charge, to any person obtaining
8
   a copy of this software and associated documentation files (the
9
   ``Software''), to deal in the Software without restriction, including
10
   without limitation the rights to use, copy, modify, merge, publish,
11
   distribute, sublicense, and/or sell copies of the Software, and to
12
   permit persons to whom the Software is furnished to do so, subject to
13
   the following conditions:
14
 
15
   The above copyright notice and this permission notice shall be included
16
   in all copies or substantial portions of the Software.
17
 
18
   THE SOFTWARE IS PROVIDED ``AS IS'', WITHOUT WARRANTY OF ANY KIND, EXPRESS
19
   OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20
   MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21
   IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR
22
   OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
23
   ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
24
   OTHER DEALINGS IN THE SOFTWARE.
25
   ----------------------------------------------------------------------- */
26
 
27
        .set r0,0
28
        .set r1,1
29
        .set r2,2
30
        .set r3,3
31
        .set r4,4
32
        .set r5,5
33
        .set r6,6
34
        .set r7,7
35
        .set r8,8
36
        .set r9,9
37
        .set r10,10
38
        .set r11,11
39
        .set r12,12
40
        .set r13,13
41
        .set r14,14
42
        .set r15,15
43
        .set r16,16
44
        .set r17,17
45
        .set r18,18
46
        .set r19,19
47
        .set r20,20
48
        .set r21,21
49
        .set r22,22
50
        .set r23,23
51
        .set r24,24
52
        .set r25,25
53
        .set r26,26
54
        .set r27,27
55
        .set r28,28
56
        .set r29,29
57
        .set r30,30
58
        .set r31,31
59
        .set f0,0
60
        .set f1,1
61
        .set f2,2
62
        .set f3,3
63
        .set f4,4
64
        .set f5,5
65
        .set f6,6
66
        .set f7,7
67
        .set f8,8
68
        .set f9,9
69
        .set f10,10
70
        .set f11,11
71
        .set f12,12
72
        .set f13,13
73
        .set f14,14
74
        .set f15,15
75
        .set f16,16
76
        .set f17,17
77
        .set f18,18
78
        .set f19,19
79
        .set f20,20
80
        .set f21,21
81
 
82
#define LIBFFI_ASM
83
#include 
84
#include 
85
#define JUMPTARGET(name) name
86
#define L(x) x
87
        .file "aix.S"
88
        .toc
89
 
90
        /* void ffi_call_AIX(extended_cif *ecif, unsigned long bytes,
91
         *                   unsigned int flags, unsigned int *rvalue,
92
         *                   void (*fn)(),
93
         *                   void (*prep_args)(extended_cif*, unsigned *const));
94
         * r3=ecif, r4=bytes, r5=flags, r6=rvalue, r7=fn, r8=prep_args
95
         */
96
 
97
.csect .text[PR]
98
        .align 2
99
        .globl ffi_call_AIX
100
        .globl .ffi_call_AIX
101
.csect ffi_call_AIX[DS]
102
ffi_call_AIX:
103
#ifdef __64BIT__
104
        .llong .ffi_call_AIX, TOC[tc0], 0
105
        .csect .text[PR]
106
.ffi_call_AIX:
107
        /* Save registers we use.  */
108
        mflr    r0
109
 
110
        std     r28,-32(r1)
111
        std     r29,-24(r1)
112
        std     r30,-16(r1)
113
        std     r31, -8(r1)
114
 
115
        std     r0, 16(r1)
116
        mr      r28, r1         /* our AP.  */
117
        stdux   r1, r1, r4
118
 
119
        /* Save arguments over call...  */
120
        mr      r31, r5 /* flags, */
121
        mr      r30, r6 /* rvalue, */
122
        mr      r29, r7 /* function address.  */
123
        std     r2, 40(r1)
124
 
125
        /* Call ffi_prep_args.  */
126
        mr      r4, r1
127
        bl      .ffi_prep_args
128
 
129
        /* Now do the call.  */
130
        ld      r0, 0(r29)
131
        ld      r2, 8(r29)
132
        ld      r11, 16(r29)
133
        /* Set up cr1 with bits 4-7 of the flags.  */
134
        mtcrf   0x40, r31
135
        mtctr   r0
136
        /* Load all those argument registers.  */
137
        // We have set up a nice stack frame, just load it into registers.
138
        ld      r3, 40+(1*8)(r1)
139
        ld      r4, 40+(2*8)(r1)
140
        ld      r5, 40+(3*8)(r1)
141
        ld      r6, 40+(4*8)(r1)
142
        nop
143
        ld      r7, 40+(5*8)(r1)
144
        ld      r8, 40+(6*8)(r1)
145
        ld      r9, 40+(7*8)(r1)
146
        ld      r10,40+(8*8)(r1)
147
 
148
L1:
149
        /* Load all the FP registers.  */
150
        bf      6,L2 // 2f + 0x18
151
        lfd     f1,-32-(13*8)(r28)
152
        lfd     f2,-32-(12*8)(r28)
153
        lfd     f3,-32-(11*8)(r28)
154
        lfd     f4,-32-(10*8)(r28)
155
        nop
156
        lfd     f5,-32-(9*8)(r28)
157
        lfd     f6,-32-(8*8)(r28)
158
        lfd     f7,-32-(7*8)(r28)
159
        lfd     f8,-32-(6*8)(r28)
160
        nop
161
        lfd     f9,-32-(5*8)(r28)
162
        lfd     f10,-32-(4*8)(r28)
163
        lfd     f11,-32-(3*8)(r28)
164
        lfd     f12,-32-(2*8)(r28)
165
        nop
166
        lfd     f13,-32-(1*8)(r28)
167
 
168
L2:
169
        /* Make the call.  */
170
        bctrl
171
        ld      r2, 40(r1)
172
 
173
        /* Now, deal with the return value.  */
174
        mtcrf   0x01, r31
175
 
176
        bt      30, L(done_return_value)
177
        bt      29, L(fp_return_value)
178
        std     r3, 0(r30)
179
 
180
        /* Fall through...  */
181
 
182
L(done_return_value):
183
        /* Restore the registers we used and return.  */
184
        mr      r1, r28
185
        ld      r0, 16(r28)
186
        ld      r28, -32(r1)
187
        mtlr    r0
188
        ld      r29, -24(r1)
189
        ld      r30, -16(r1)
190
        ld      r31, -8(r1)
191
        blr
192
 
193
L(fp_return_value):
194
        bf      28, L(float_return_value)
195
        stfd    f1, 0(r30)
196
        bf      31, L(done_return_value)
197
        stfd    f2, 8(r30)
198
        b       L(done_return_value)
199
L(float_return_value):
200
        stfs    f1, 0(r30)
201
        b       L(done_return_value)
202
 
203
#else /* ! __64BIT__ */
204
 
205
        .long .ffi_call_AIX, TOC[tc0], 0
206
        .csect .text[PR]
207
.ffi_call_AIX:
208
        /* Save registers we use.  */
209
        mflr    r0
210
 
211
        stw     r28,-16(r1)
212
        stw     r29,-12(r1)
213
        stw     r30, -8(r1)
214
        stw     r31, -4(r1)
215
 
216
        stw     r0, 8(r1)
217
        mr      r28, r1         /* out AP.  */
218
        stwux   r1, r1, r4
219
 
220
        /* Save arguments over call...  */
221
        mr      r31, r5 /* flags, */
222
        mr      r30, r6 /* rvalue, */
223
        mr      r29, r7 /* function address, */
224
        stw     r2, 20(r1)
225
 
226
        /* Call ffi_prep_args.  */
227
        mr      r4, r1
228
        bl      .ffi_prep_args
229
 
230
        /* Now do the call.  */
231
        lwz     r0, 0(r29)
232
        lwz     r2, 4(r29)
233
        lwz     r11, 8(r29)
234
        /* Set up cr1 with bits 4-7 of the flags.  */
235
        mtcrf   0x40, r31
236
        mtctr   r0
237
        /* Load all those argument registers.  */
238
        // We have set up a nice stack frame, just load it into registers.
239
        lwz     r3, 20+(1*4)(r1)
240
        lwz     r4, 20+(2*4)(r1)
241
        lwz     r5, 20+(3*4)(r1)
242
        lwz     r6, 20+(4*4)(r1)
243
        nop
244
        lwz     r7, 20+(5*4)(r1)
245
        lwz     r8, 20+(6*4)(r1)
246
        lwz     r9, 20+(7*4)(r1)
247
        lwz     r10,20+(8*4)(r1)
248
 
249
L1:
250
        /* Load all the FP registers.  */
251
        bf      6,L2 // 2f + 0x18
252
        lfd     f1,-16-(13*8)(r28)
253
        lfd     f2,-16-(12*8)(r28)
254
        lfd     f3,-16-(11*8)(r28)
255
        lfd     f4,-16-(10*8)(r28)
256
        nop
257
        lfd     f5,-16-(9*8)(r28)
258
        lfd     f6,-16-(8*8)(r28)
259
        lfd     f7,-16-(7*8)(r28)
260
        lfd     f8,-16-(6*8)(r28)
261
        nop
262
        lfd     f9,-16-(5*8)(r28)
263
        lfd     f10,-16-(4*8)(r28)
264
        lfd     f11,-16-(3*8)(r28)
265
        lfd     f12,-16-(2*8)(r28)
266
        nop
267
        lfd     f13,-16-(1*8)(r28)
268
 
269
L2:
270
        /* Make the call.  */
271
        bctrl
272
        lwz     r2, 20(r1)
273
 
274
        /* Now, deal with the return value.  */
275
        mtcrf   0x01, r31
276
 
277
        bt      30, L(done_return_value)
278
        bt      29, L(fp_return_value)
279
        stw     r3, 0(r30)
280
        bf      28, L(done_return_value)
281
        stw     r4, 4(r30)
282
 
283
        /* Fall through...  */
284
 
285
L(done_return_value):
286
        /* Restore the registers we used and return.  */
287
        mr      r1, r28
288
        lwz     r0, 8(r28)
289
        lwz     r28,-16(r1)
290
        mtlr    r0
291
        lwz     r29,-12(r1)
292
        lwz     r30, -8(r1)
293
        lwz     r31, -4(r1)
294
        blr
295
 
296
L(fp_return_value):
297
        bf      28, L(float_return_value)
298
        stfd    f1, 0(r30)
299
        b       L(done_return_value)
300
L(float_return_value):
301
        stfs    f1, 0(r30)
302
        b       L(done_return_value)
303
#endif
304
        .long 0
305
        .byte 0,0,0,1,128,4,0,0
306
//END(ffi_call_AIX)
307
 
308
.csect .text[PR]
309
        .align 2
310
        .globl ffi_call_DARWIN
311
        .globl .ffi_call_DARWIN
312
.csect ffi_call_DARWIN[DS]
313
ffi_call_DARWIN:
314
#ifdef __64BIT__
315
        .llong .ffi_call_DARWIN, TOC[tc0], 0
316
#else
317
        .long .ffi_call_DARWIN, TOC[tc0], 0
318
#endif
319
        .csect .text[PR]
320
.ffi_call_DARWIN:
321
        blr
322
        .long 0
323
        .byte 0,0,0,0,0,0,0,0
324
//END(ffi_call_DARWIN)

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.